ASoC: rt1019: Fix the TDM settings

Complete the missing and correct the TDM settings.

Signed-off-by: Derek Fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/20221012030102.4042-1-derek.fang@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Derek Fang 2022-10-12 11:01:02 +08:00 committed by Mark Brown
parent d94bf16e92
commit f2635d45a7
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 17 additions and 9 deletions

View File

@ -391,18 +391,18 @@ static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
unsigned int rx_mask, int slots, int slot_width)
{
struct snd_soc_component *component = dai->component;
unsigned int val = 0, rx_slotnum;
unsigned int cn = 0, cl = 0, rx_slotnum;
int ret = 0, first_bit;
switch (slots) {
case 4:
val |= RT1019_I2S_TX_4CH;
cn = RT1019_I2S_TX_4CH;
break;
case 6:
val |= RT1019_I2S_TX_6CH;
cn = RT1019_I2S_TX_6CH;
break;
case 8:
val |= RT1019_I2S_TX_8CH;
cn = RT1019_I2S_TX_8CH;
break;
case 2:
break;
@ -412,16 +412,16 @@ static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
switch (slot_width) {
case 20:
val |= RT1019_I2S_DL_20;
cl = RT1019_TDM_CL_20;
break;
case 24:
val |= RT1019_I2S_DL_24;
cl = RT1019_TDM_CL_24;
break;
case 32:
val |= RT1019_I2S_DL_32;
cl = RT1019_TDM_CL_32;
break;
case 8:
val |= RT1019_I2S_DL_8;
cl = RT1019_TDM_CL_8;
break;
case 16:
break;
@ -470,8 +470,10 @@ static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
goto _set_tdm_err_;
}
snd_soc_component_update_bits(component, RT1019_TDM_1,
RT1019_TDM_CL_MASK, cl);
snd_soc_component_update_bits(component, RT1019_TDM_2,
RT1019_I2S_CH_TX_MASK | RT1019_I2S_DF_MASK, val);
RT1019_I2S_CH_TX_MASK, cn);
_set_tdm_err_:
return ret;

View File

@ -95,6 +95,12 @@
#define RT1019_TDM_BCLK_MASK (0x1 << 6)
#define RT1019_TDM_BCLK_NORM (0x0 << 6)
#define RT1019_TDM_BCLK_INV (0x1 << 6)
#define RT1019_TDM_CL_MASK (0x7)
#define RT1019_TDM_CL_8 (0x4)
#define RT1019_TDM_CL_32 (0x3)
#define RT1019_TDM_CL_24 (0x2)
#define RT1019_TDM_CL_20 (0x1)
#define RT1019_TDM_CL_16 (0x0)
/* 0x0401 TDM Control-2 */
#define RT1019_I2S_CH_TX_MASK (0x3 << 6)