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A set of small fixes for omaps for the -rc cycle:

Browse Source 
- am7303 iva2 reset PM regression fix
 - am33xx uart2 dma channel fix
 - am33xx gpmc properties fix
 - omap44xx rtc wake-up mux fix for nirq pins
 - omap36xx clock divider restore fix
 
 There's also one tiny non-critical .dts fix for omap5
 timer pwm properties.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJRs4AGAAoJEBvUPslcq6VzY6cQANFqjGL1GFzMFazsoinAd5RA
 Su8AzWCah/Ve6pkpqIxNb4tQon8leFYADYwfddf6dOb76r4i9xBD83xTr8J5JMyu
 dGBLtIyOZur2DiRljFwPKPrrZ2JuKcN8OXoKr6MEeh8UsiYBEav0HWgEzfC/SSzH
 5BXYX99TkqSi1Ei7vsZBXKNhjF6l4Orirx0yKnFWqIwmCJgeVMIMEZDgnh1Q7h2p
 9iXUGwGTBwaxdvZjrmrVTWAToy0XkMgQJaIOrYeJvLI8NF9JoGsbkJVLQTr17tzJ
 i9QIImPlgsa8vzFDWly38FT6tuZ3JC3Vq7YM+aEIjRyqOWNhOl9LTTCTOqTA8q0L
 amNGrF00j3fdRTm9XHWf9JN5RyNTSjfrjc1/0ptAnoV6J4tswQaN5Sr4kd8TU3VL
 BDA5MtmlH87WJ3TU8PhnTbrWZVGSymNTTBaF1EuWYMLmxtDr5GRmmZEEBYH1ZGqv
 Pkyr4BqM7+yd0Gjxm+3i37q7QXUnKzN/vop0mXDrfMXA1pHFH80C/sthu8V17fm4
 QB5gCdpfnOtyI8lq49pqURh/3AWnYgX47vtFNMfGh8o+s4KNV9xDX7S9jnL5DXyk
 ththcVRSZnslBooGYlAXfp8DG3XnGFw3ngkHNimU9cLkIMCpr/pyrCWBMKOzJEcR
 sjEvAvY7QKWLJ37ACSed
 =KVcG
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v3.10/fixes-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren, a set of small fixes for omaps for the -rc cycle:

- am7303 iva2 reset PM regression fix
- am33xx uart2 dma channel fix
- am33xx gpmc properties fix
- omap44xx rtc wake-up mux fix for nirq pins
- omap36xx clock divider restore fix

There's also one tiny non-critical .dts fix for omap5
timer pwm properties.

* tag 'omap-for-v3.10/fixes-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap3: clock: fix wrong container_of in clock36xx.c
  ARM: dts: OMAP5: Fix missing PWM capability to timer nodes
  ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
  ARM: dts: AM33xx: Fix properties on gpmc node
  arm: omap2: fix AM33xx hwmod infos for UART2
  ARM: OMAP3: Fix iva2_pwrdm settings for 3703
This commit is contained in:
Olof Johansson 2013-06-09 11:44:17 -07:00
commit f1d6e31de1
7 changed files with 66 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/am33xx.dtsi
View File

@ -409,8 +409,8 @@
ti,hwmods = "gpmc";
reg = <0x50000000 0x2000>;
interrupts = <100>;
num-cs = <7>;
num-waitpins = <2>;
gpmc,num-cs = <7>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
status = "disabled";

20
arch/arm/boot/dts/omap4-panda-common.dtsi
View File

@ -56,9 +56,23 @@
};
};
&omap4_pmx_wkup {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_wkup_pins
>;
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
pinctrl-single,pins = <
0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
>;
};
};
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_pins
&twl6040_pins
&mcpdm_pins
&mcbsp1_pins
@ -66,6 +80,12 @@
&tpd12s015_pins
>;
twl6030_pins: pinmux_twl6030_pins {
pinctrl-single,pins = <
0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
>;
};
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */

20
arch/arm/boot/dts/omap4-sdp.dts
View File

@ -142,9 +142,23 @@
};
};
&omap4_pmx_wkup {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_wkup_pins
>;
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
pinctrl-single,pins = <
0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
>;
};
};
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_pins
&twl6040_pins
&mcpdm_pins
&dmic_pins
@ -179,6 +193,12 @@
>;
};
twl6030_pins: pinmux_twl6030_pins {
pinctrl-single,pins = <
0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
>;
};
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */

3
arch/arm/boot/dts/omap5.dtsi
View File

@ -538,6 +538,7 @@
interrupts = <0 41 0x4>;
ti,hwmods = "timer5";
ti,timer-dsp;
ti,timer-pwm;
};
timer6: timer@4013a000 {
@ -574,6 +575,7 @@
reg = <0x4803e000 0x80>;
interrupts = <0 45 0x4>;
ti,hwmods = "timer9";
ti,timer-pwm;
};
timer10: timer@48086000 {
@ -581,6 +583,7 @@
reg = <0x48086000 0x80>;
interrupts = <0 46 0x4>;
ti,hwmods = "timer10";
ti,timer-pwm;
};
timer11: timer@48088000 {

18
arch/arm/mach-omap2/clock36xx.c
View File

@ -20,11 +20,12 @@
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include "clock.h"
#include "clock36xx.h"
#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
/**
* omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
@ -39,29 +40,28 @@
*/
int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
{
struct clk_hw_omap *parent;
struct clk_divider *parent;
struct clk_hw *parent_hw;
u32 dummy_v, orig_v, clksel_shift;
u32 dummy_v, orig_v;
int ret;
/* Clear PWRDN bit of HSDIVIDER */
ret = omap2_dflt_clk_enable(clk);
parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
parent = to_clk_hw_omap(parent_hw);
parent = to_clk_divider(parent_hw);
/* Restore the dividers */
if (!ret) {
clksel_shift = __ffs(parent->clksel_mask);
orig_v = __raw_readl(parent->clksel_reg);
orig_v = __raw_readl(parent->reg);
dummy_v = orig_v;
/* Write any other value different from the Read value */
dummy_v ^= (1 << clksel_shift);
__raw_writel(dummy_v, parent->clksel_reg);
dummy_v ^= (1 << parent->shift);
__raw_writel(dummy_v, parent->reg);
/* Write the original divider */
__raw_writel(orig_v, parent->clksel_reg);
__raw_writel(orig_v, parent->reg);
}
return ret;

9
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
View File

@ -2007,6 +2007,13 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
},
};
/* uart2 */
static struct omap_hwmod_dma_info uart2_edma_reqs[] = {
{ .name = "tx", .dma_req = 28, },
{ .name = "rx", .dma_req = 29, },
{ .dma_req = -1 }
};
static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
{ .irq = 73 + OMAP_INTC_START, },
{ .irq = -1 },
@ -2018,7 +2025,7 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.mpu_irqs = am33xx_uart2_irqs,
.sdma_reqs = uart1_edma_reqs,
.sdma_reqs = uart2_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {

6
arch/arm/mach-omap2/pm34xx.c
View File

@ -546,8 +546,10 @@ static void __init prcm_setup_regs(void)
/* Clear any pending PRCM interrupts */
omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
if (omap3_has_iva())
omap3_iva_idle();
/*
* We need to idle iva2_pwrdm even on am3703 with no iva2.
*/
omap3_iva_idle();
omap3_d2d_idle();
}