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spi/tegra20-slink: Move first transfer preparation to prepare_message
This is more idiomatic for the factored out message processing and gives a small simplification of the code since we always set the per-transfer parameters in the same fashion. Signed-off-by: Mark Brown <broonie@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com>
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@ -196,7 +196,6 @@ struct tegra_slink_data {
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u32 rx_status;
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u32 status_reg;
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bool is_packed;
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bool is_first_msg;
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unsigned long packed_size;
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u32 command_reg;
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@ -708,7 +707,7 @@ static void tegra_slink_deinit_dma_param(struct tegra_slink_data *tspi,
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}
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static int tegra_slink_start_transfer_one(struct spi_device *spi,
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struct spi_transfer *t, bool is_first_of_msg)
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struct spi_transfer *t)
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{
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struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master);
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u32 speed;
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@ -732,32 +731,12 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
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tspi->curr_xfer = t;
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total_fifo_words = tegra_slink_calculate_curr_xfer_param(spi, tspi, t);
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if (is_first_of_msg) {
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tegra_slink_clear_status(tspi);
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command = tspi->command_reg;
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command &= ~SLINK_BIT_LENGTH(~0);
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command |= SLINK_BIT_LENGTH(bits_per_word - 1);
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command = tspi->def_command_reg;
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command |= SLINK_BIT_LENGTH(bits_per_word - 1);
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command |= SLINK_CS_SW | SLINK_CS_VALUE;
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command2 = tspi->def_command2_reg;
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command2 |= SLINK_SS_EN_CS(spi->chip_select);
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command &= ~SLINK_MODES;
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if (spi->mode & SPI_CPHA)
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command |= SLINK_CK_SDA;
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if (spi->mode & SPI_CPOL)
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command |= SLINK_IDLE_SCLK_DRIVE_HIGH;
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else
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command |= SLINK_IDLE_SCLK_DRIVE_LOW;
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} else {
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command = tspi->command_reg;
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command &= ~SLINK_BIT_LENGTH(~0);
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command |= SLINK_BIT_LENGTH(bits_per_word - 1);
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command2 = tspi->command2_reg;
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command2 &= ~(SLINK_RXEN | SLINK_TXEN);
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}
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command2 = tspi->command2_reg;
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command2 &= ~(SLINK_RXEN | SLINK_TXEN);
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tegra_slink_writel(tspi, command, SLINK_COMMAND);
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tspi->command_reg = command;
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@ -828,8 +807,24 @@ static int tegra_slink_prepare_message(struct spi_master *master,
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struct spi_message *msg)
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{
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struct tegra_slink_data *tspi = spi_master_get_devdata(master);
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struct spi_device *spi = msg->spi;
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tspi->is_first_msg = true;
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tegra_slink_clear_status(tspi);
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tspi->command_reg = tspi->def_command_reg;
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tspi->command_reg |= SLINK_CS_SW | SLINK_CS_VALUE;
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tspi->command2_reg = tspi->def_command2_reg;
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tspi->command2_reg |= SLINK_SS_EN_CS(spi->chip_select);
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tspi->command_reg &= ~SLINK_MODES;
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if (spi->mode & SPI_CPHA)
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tspi->command_reg |= SLINK_CK_SDA;
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if (spi->mode & SPI_CPOL)
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tspi->command_reg |= SLINK_IDLE_SCLK_DRIVE_HIGH;
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else
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tspi->command_reg |= SLINK_IDLE_SCLK_DRIVE_LOW;
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return 0;
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}
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@ -842,13 +837,13 @@ static int tegra_slink_transfer_one(struct spi_master *master,
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int ret;
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INIT_COMPLETION(tspi->xfer_completion);
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ret = tegra_slink_start_transfer_one(spi, xfer, tspi->is_first_msg);
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ret = tegra_slink_start_transfer_one(spi, xfer);
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if (ret < 0) {
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dev_err(tspi->dev,
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"spi can not start transfer, err %d\n", ret);
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return ret;
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}
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tspi->is_first_msg = false;
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ret = wait_for_completion_timeout(&tspi->xfer_completion,
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SLINK_DMA_TIMEOUT);
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if (WARN_ON(ret == 0)) {
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