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RDMA-rxe: Isolate mr code from atomic_reply()
Isolate mr specific code from atomic_reply() in rxe_resp.c into a subroutine rxe_mr_do_atomic_op() in rxe_mr.c. Minor cleanups to rxe_check_range() and iova_to_vaddr(). Move enum resp_state to rxe.h Link: https://lore.kernel.org/r/20230119235936.19728-4-rpearsonhpe@gmail.com Signed-off-by: Bob Pearson <rpearsonhpe@gmail.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -57,6 +57,44 @@
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#define rxe_dbg_mw(mw, fmt, ...) ibdev_dbg((mw)->ibmw.device, \
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"mw#%d %s: " fmt, (mw)->elem.index, __func__, ##__VA_ARGS__)
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/* responder states */
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enum resp_states {
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RESPST_NONE,
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RESPST_GET_REQ,
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RESPST_CHK_PSN,
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RESPST_CHK_OP_SEQ,
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RESPST_CHK_OP_VALID,
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RESPST_CHK_RESOURCE,
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RESPST_CHK_LENGTH,
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RESPST_CHK_RKEY,
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RESPST_EXECUTE,
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RESPST_READ_REPLY,
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RESPST_ATOMIC_REPLY,
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RESPST_ATOMIC_WRITE_REPLY,
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RESPST_PROCESS_FLUSH,
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RESPST_COMPLETE,
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RESPST_ACKNOWLEDGE,
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RESPST_CLEANUP,
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RESPST_DUPLICATE_REQUEST,
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RESPST_ERR_MALFORMED_WQE,
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RESPST_ERR_UNSUPPORTED_OPCODE,
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RESPST_ERR_MISALIGNED_ATOMIC,
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RESPST_ERR_PSN_OUT_OF_SEQ,
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RESPST_ERR_MISSING_OPCODE_FIRST,
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RESPST_ERR_MISSING_OPCODE_LAST_C,
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RESPST_ERR_MISSING_OPCODE_LAST_D1E,
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RESPST_ERR_TOO_MANY_RDMA_ATM_REQ,
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RESPST_ERR_RNR,
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RESPST_ERR_RKEY_VIOLATION,
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RESPST_ERR_INVALIDATE_RKEY,
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RESPST_ERR_LENGTH,
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RESPST_ERR_CQ_OVERFLOW,
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RESPST_ERROR,
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RESPST_RESET,
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RESPST_DONE,
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RESPST_EXIT,
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};
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void rxe_set_mtu(struct rxe_dev *rxe, unsigned int dev_mtu);
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int rxe_add(struct rxe_dev *rxe, unsigned int mtu, const char *ibdev_name);
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@ -72,6 +72,8 @@ int copy_data(struct rxe_pd *pd, int access, struct rxe_dma_info *dma,
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int rxe_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
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int sg_nents, unsigned int *sg_offset);
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void *iova_to_vaddr(struct rxe_mr *mr, u64 iova, int length);
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int rxe_mr_do_atomic_op(struct rxe_mr *mr, u64 iova, int opcode,
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u64 compare, u64 swap_add, u64 *orig_val);
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struct rxe_mr *lookup_mr(struct rxe_pd *pd, int access, u32 key,
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enum rxe_mr_lookup_type type);
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int mr_check_range(struct rxe_mr *mr, u64 iova, size_t length);
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@ -32,13 +32,15 @@ int mr_check_range(struct rxe_mr *mr, u64 iova, size_t length)
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case IB_MR_TYPE_USER:
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case IB_MR_TYPE_MEM_REG:
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if (iova < mr->ibmr.iova || length > mr->ibmr.length ||
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iova > mr->ibmr.iova + mr->ibmr.length - length)
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return -EFAULT;
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if (iova < mr->ibmr.iova ||
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iova + length > mr->ibmr.iova + mr->ibmr.length) {
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rxe_dbg_mr(mr, "iova/length out of range");
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return -EINVAL;
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}
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return 0;
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default:
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rxe_dbg_mr(mr, "type (%d) not supported\n", mr->ibmr.type);
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rxe_dbg_mr(mr, "mr type not supported\n");
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return -EINVAL;
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}
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}
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@ -299,37 +301,22 @@ void *iova_to_vaddr(struct rxe_mr *mr, u64 iova, int length)
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{
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size_t offset;
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int m, n;
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void *addr;
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if (mr->state != RXE_MR_STATE_VALID) {
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rxe_dbg_mr(mr, "Not in valid state\n");
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addr = NULL;
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goto out;
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}
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if (mr->state != RXE_MR_STATE_VALID)
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return NULL;
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if (!mr->map) {
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addr = (void *)(uintptr_t)iova;
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goto out;
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}
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if (mr->ibmr.type == IB_MR_TYPE_DMA)
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return (void *)(uintptr_t)iova;
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if (mr_check_range(mr, iova, length)) {
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rxe_dbg_mr(mr, "Range violation\n");
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addr = NULL;
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goto out;
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}
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if (mr_check_range(mr, iova, length))
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return NULL;
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lookup_iova(mr, iova, &m, &n, &offset);
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if (offset + length > mr->map[m]->buf[n].size) {
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rxe_dbg_mr(mr, "Crosses page boundary\n");
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addr = NULL;
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goto out;
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}
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if (offset + length > mr->map[m]->buf[n].size)
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return NULL;
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addr = (void *)(uintptr_t)mr->map[m]->buf[n].addr + offset;
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out:
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return addr;
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return (void *)(uintptr_t)mr->map[m]->buf[n].addr + offset;
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}
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int rxe_flush_pmem_iova(struct rxe_mr *mr, u64 iova, int length)
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@ -538,6 +525,46 @@ err1:
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return err;
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}
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/* Guarantee atomicity of atomic operations at the machine level. */
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static DEFINE_SPINLOCK(atomic_ops_lock);
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int rxe_mr_do_atomic_op(struct rxe_mr *mr, u64 iova, int opcode,
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u64 compare, u64 swap_add, u64 *orig_val)
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{
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u64 *va;
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u64 value;
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if (mr->state != RXE_MR_STATE_VALID) {
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rxe_dbg_mr(mr, "mr not in valid state");
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return RESPST_ERR_RKEY_VIOLATION;
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}
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va = iova_to_vaddr(mr, iova, sizeof(u64));
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if (!va) {
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rxe_dbg_mr(mr, "iova out of range");
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return RESPST_ERR_RKEY_VIOLATION;
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}
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if ((uintptr_t)va & 0x7) {
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rxe_dbg_mr(mr, "iova not aligned");
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return RESPST_ERR_MISALIGNED_ATOMIC;
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}
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spin_lock_bh(&atomic_ops_lock);
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value = *orig_val = *va;
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if (opcode == IB_OPCODE_RC_COMPARE_SWAP) {
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if (value == compare)
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*va = swap_add;
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} else {
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value += swap_add;
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*va = value;
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}
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spin_unlock_bh(&atomic_ops_lock);
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return 0;
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}
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int advance_dma_data(struct rxe_dma_info *dma, unsigned int length)
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{
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struct rxe_sge *sge = &dma->sge[dma->cur_sge];
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@ -10,43 +10,6 @@
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#include "rxe_loc.h"
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#include "rxe_queue.h"
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enum resp_states {
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RESPST_NONE,
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RESPST_GET_REQ,
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RESPST_CHK_PSN,
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RESPST_CHK_OP_SEQ,
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RESPST_CHK_OP_VALID,
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RESPST_CHK_RESOURCE,
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RESPST_CHK_LENGTH,
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RESPST_CHK_RKEY,
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RESPST_EXECUTE,
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RESPST_READ_REPLY,
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RESPST_ATOMIC_REPLY,
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RESPST_ATOMIC_WRITE_REPLY,
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RESPST_PROCESS_FLUSH,
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RESPST_COMPLETE,
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RESPST_ACKNOWLEDGE,
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RESPST_CLEANUP,
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RESPST_DUPLICATE_REQUEST,
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RESPST_ERR_MALFORMED_WQE,
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RESPST_ERR_UNSUPPORTED_OPCODE,
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RESPST_ERR_MISALIGNED_ATOMIC,
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RESPST_ERR_PSN_OUT_OF_SEQ,
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RESPST_ERR_MISSING_OPCODE_FIRST,
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RESPST_ERR_MISSING_OPCODE_LAST_C,
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RESPST_ERR_MISSING_OPCODE_LAST_D1E,
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RESPST_ERR_TOO_MANY_RDMA_ATM_REQ,
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RESPST_ERR_RNR,
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RESPST_ERR_RKEY_VIOLATION,
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RESPST_ERR_INVALIDATE_RKEY,
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RESPST_ERR_LENGTH,
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RESPST_ERR_CQ_OVERFLOW,
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RESPST_ERROR,
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RESPST_RESET,
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RESPST_DONE,
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RESPST_EXIT,
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};
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static char *resp_state_name[] = {
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[RESPST_NONE] = "NONE",
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[RESPST_GET_REQ] = "GET_REQ",
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@ -725,17 +688,12 @@ static enum resp_states process_flush(struct rxe_qp *qp,
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return RESPST_ACKNOWLEDGE;
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}
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/* Guarantee atomicity of atomic operations at the machine level. */
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static DEFINE_SPINLOCK(atomic_ops_lock);
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static enum resp_states atomic_reply(struct rxe_qp *qp,
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struct rxe_pkt_info *pkt)
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struct rxe_pkt_info *pkt)
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{
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u64 *vaddr;
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enum resp_states ret;
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struct rxe_mr *mr = qp->resp.mr;
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struct resp_res *res = qp->resp.res;
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u64 value;
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int err;
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if (!res) {
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res = rxe_prepare_res(qp, pkt, RXE_ATOMIC_MASK);
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@ -743,32 +701,14 @@ static enum resp_states atomic_reply(struct rxe_qp *qp,
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}
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if (!res->replay) {
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if (mr->state != RXE_MR_STATE_VALID) {
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ret = RESPST_ERR_RKEY_VIOLATION;
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goto out;
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}
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u64 iova = qp->resp.va + qp->resp.offset;
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vaddr = iova_to_vaddr(mr, qp->resp.va + qp->resp.offset,
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sizeof(u64));
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/* check vaddr is 8 bytes aligned. */
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if (!vaddr || (uintptr_t)vaddr & 7) {
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ret = RESPST_ERR_MISALIGNED_ATOMIC;
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goto out;
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}
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spin_lock_bh(&atomic_ops_lock);
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res->atomic.orig_val = value = *vaddr;
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if (pkt->opcode == IB_OPCODE_RC_COMPARE_SWAP) {
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if (value == atmeth_comp(pkt))
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value = atmeth_swap_add(pkt);
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} else {
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value += atmeth_swap_add(pkt);
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}
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*vaddr = value;
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spin_unlock_bh(&atomic_ops_lock);
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err = rxe_mr_do_atomic_op(mr, iova, pkt->opcode,
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atmeth_comp(pkt),
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atmeth_swap_add(pkt),
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&res->atomic.orig_val);
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if (err)
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return err;
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qp->resp.msn++;
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@ -780,9 +720,7 @@ static enum resp_states atomic_reply(struct rxe_qp *qp,
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qp->resp.status = IB_WC_SUCCESS;
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}
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ret = RESPST_ACKNOWLEDGE;
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out:
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return ret;
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return RESPST_ACKNOWLEDGE;
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}
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#ifdef CONFIG_64BIT
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