parisc architecture fixes and updates for kernel v6.7-rc1:

- Add nop instructions after TLB inserts for PA8x00 CPUs
 - Fix a 64-bit kernel crash in STI font routines which miscalculates
   the font start address as it gets signed vs unsigned offsets wrong
 - Support building an uncompressed Linux kernel
 - Simplify smp_prepare_boot_cpu() function
 - Support for soft power-off in qemu
 - Use 64-bit little-endian values in SBA IOMMU PDIR table for AGP
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Merge tag 'parisc-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux

Pull parisc updates from Helge Deller:
 "Usual fixes and updates:

   - Add up to 12 nops after TLB inserts for PA8x00 CPUs as the
     specification requires (Dave Anglin)

   - Simplify the parisc smp_prepare_boot_cpu() code (Russell King)

   - Use 64-bit little-endian values in SBA IOMMU PDIR table for AGP

  Since there is upcoming support for booting a 64-bit kernel on QEMU,
  some corner cases were fixed and improvements added:

   - Fix 64-bit kernel crash in STI (graphics console) font setup code
     which miscalculated the font start address as it gets signed vs
     unsigned offsets wrong

   - Support building an uncompressed Linux kernel

   - Add support for soft power-off in qemu"

* tag 'parisc-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  fbdev: stifb: Make the STI next font pointer a 32-bit signed offset
  parisc: Show default CPU PSW.W setting as reported by PDC
  parisc/pdc: Add width field to struct pdc_model
  parisc: Add nop instructions after TLB inserts
  parisc: simplify smp_prepare_boot_cpu()
  parisc/agp: Use 64-bit LE values in SBA IOMMU PDIR table
  parisc/firmware: Use PDC constants for narrow/wide firmware
  parisc: Move parisc_narrow_firmware variable to header file
  parisc/power: Trivial whitespace cleanups and license update
  parisc/power: Add power soft-off when running on qemu
  parisc: Allow building uncompressed Linux kernel
  parisc: Add some missing PDC functions and constants
  parisc: sba-iommu: Fix comment when calculating IOC number
This commit is contained in:
Linus Torvalds 2023-11-01 10:21:07 -10:00
commit f00593e099
14 changed files with 133 additions and 102 deletions

View File

@ -25,6 +25,7 @@ config PARISC
select INIT_ALL_POSSIBLE
select BUG
select BUILDTIME_TABLE_SORT
select HAVE_KERNEL_UNCOMPRESSED
select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_KERNEL_BZIP2

View File

@ -10,7 +10,7 @@ subdir- := compressed
$(obj)/image: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/bzImage: $(obj)/compressed/vmlinux FORCE
$(obj)/bzImage: $(if $(CONFIG_KERNEL_UNCOMPRESSED),$(objtree)/vmlinux,$(obj)/compressed/vmlinux) FORCE
$(call if_changed,objcopy)
$(obj)/compressed/vmlinux: FORCE

View File

@ -287,6 +287,7 @@ extern int _parisc_requires_coherency;
#endif
extern int running_on_qemu;
extern int parisc_narrow_firmware;
extern void __noreturn toc_intr(struct pt_regs *regs);
extern void toc_handler(void);

View File

@ -58,8 +58,8 @@
#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
#define PDC_MODEL_NVA_SLOW (1 << 4)
#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
#define PDC_MODEL_FIRM_TEST_GET 8 /* returns boot test options */
#define PDC_MODEL_FIRM_TEST_SET 9 /* set boot test options */
#define PDC_MODEL_GET_PLATFORM_INFO 10 /* returns platform info */
#define PDC_MODEL_GET_INSTALL_KERNEL 11 /* returns kernel for installation */
@ -472,6 +472,7 @@ struct pdc_model { /* for PDC_MODEL */
unsigned long arch_rev;
unsigned long pot_key;
unsigned long curr_key;
unsigned long width; /* default of PSW_W bit (1=enabled) */
};
struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
@ -609,6 +610,12 @@ struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
unsigned long mod_pgs;
};
struct pdc_relocate_info_block { /* PDC_RELOCATE_INFO */
unsigned long pdc_size;
unsigned long pdc_alignment;
unsigned long pdc_address;
};
struct pdc_initiator { /* PDC_INITIATOR */
int host_id;
int factor;
@ -717,6 +724,23 @@ struct pdc_toc_pim_20 {
struct pim_cpu_state_cf cpu_state;
};
/* for SpeedyBoot/firm_ctl funtionality */
struct pdc_firm_test_get_rtn_block { /* PDC_MODEL/PDC_FIRM_TEST_GET */
unsigned long current_tests; /* u_R_addr Raddr_ints[0] */
unsigned long tests_supported; /* u_R_addr Raddr_ints[1] */
unsigned long default_tests; /* u_R_addr Raddr_ints[2] */
};
#define TORNADO_CPU_ID 0xB
#define PCXL_CPU_ID 0xD
#define PCXU_CPU_ID 0xE /* U and U+ for all but C-class with bug */
#define VR_CPU_ID 0xF
#define PCXU_PLUS_CPU_ID 0x10 /* U+ only on C-class with bug */
#define PCXW_CPU_ID 0x11
#define PCXW_PLUS_CPU_ID 0x12
#define PIRANHA_CPU_ID 0x13
#define MAKO_CPU_ID 0x14
#endif /* !defined(__ASSEMBLY__) */
#endif /* _UAPI_PARISC_PDC_H */

View File

@ -927,8 +927,8 @@ static __init void qemu_header(void)
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9]);
#undef p
pr_info("#define PARISC_PDC_VERSION 0x%04lx\n\n",

View File

@ -36,6 +36,24 @@
.level 2.0
#endif
/*
* We need seven instructions after a TLB insert for it to take effect.
* The PA8800/PA8900 processors are an exception and need 12 instructions.
* The RFI changes both IAOQ_Back and IAOQ_Front, so it counts as one.
*/
#ifdef CONFIG_64BIT
#define NUM_PIPELINE_INSNS 12
#else
#define NUM_PIPELINE_INSNS 7
#endif
/* Insert num nops */
.macro insert_nops num
.rept \num
nop
.endr
.endm
/* Get aligned page_table_lock address for this mm from cr28/tr4 */
.macro get_ptl reg
mfctl %cr28,\reg
@ -415,24 +433,20 @@
3:
.endm
/* Release page_table_lock without reloading lock address.
We use an ordered store to ensure all prior accesses are
performed prior to releasing the lock. */
.macro ptl_unlock0 spc,tmp,tmp2
/* Release page_table_lock if for user space. We use an ordered
store to ensure all prior accesses are performed prior to
releasing the lock. Note stw may not be executed, so we
provide one extra nop when CONFIG_TLB_PTLOCK is defined. */
.macro ptl_unlock spc,tmp,tmp2
#ifdef CONFIG_TLB_PTLOCK
98: ldi __ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmp2
98: get_ptl \tmp
ldi __ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmp2
or,COND(=) %r0,\spc,%r0
stw,ma \tmp2,0(\tmp)
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
#endif
.endm
/* Release page_table_lock. */
.macro ptl_unlock1 spc,tmp,tmp2
#ifdef CONFIG_TLB_PTLOCK
98: get_ptl \tmp
ptl_unlock0 \spc,\tmp,\tmp2
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
insert_nops NUM_PIPELINE_INSNS - 4
#else
insert_nops NUM_PIPELINE_INSNS - 1
#endif
.endm
@ -1124,7 +1138,7 @@ dtlb_miss_20w:
idtlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1133,6 +1147,7 @@ dtlb_check_alias_20w:
idtlbt pte,prot
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1150,7 +1165,7 @@ nadtlb_miss_20w:
idtlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1159,6 +1174,7 @@ nadtlb_check_alias_20w:
idtlbt pte,prot
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1184,7 +1200,7 @@ dtlb_miss_11:
mtsp t1, %sr1 /* Restore sr1 */
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1194,6 +1210,7 @@ dtlb_check_alias_11:
idtlba pte,(va)
idtlbp prot,(va)
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1217,7 +1234,7 @@ nadtlb_miss_11:
mtsp t1, %sr1 /* Restore sr1 */
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1227,6 +1244,7 @@ nadtlb_check_alias_11:
idtlba pte,(va)
idtlbp prot,(va)
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1246,7 +1264,7 @@ dtlb_miss_20:
idtlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1255,6 +1273,7 @@ dtlb_check_alias_20:
idtlbt pte,prot
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1274,7 +1293,7 @@ nadtlb_miss_20:
idtlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1283,6 +1302,7 @@ nadtlb_check_alias_20:
idtlbt pte,prot
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1319,7 +1339,7 @@ itlb_miss_20w:
iitlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1343,7 +1363,7 @@ naitlb_miss_20w:
iitlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1352,6 +1372,7 @@ naitlb_check_alias_20w:
iitlbt pte,prot
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1377,7 +1398,7 @@ itlb_miss_11:
mtsp t1, %sr1 /* Restore sr1 */
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1401,7 +1422,7 @@ naitlb_miss_11:
mtsp t1, %sr1 /* Restore sr1 */
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1411,6 +1432,7 @@ naitlb_check_alias_11:
iitlba pte,(%sr0, va)
iitlbp prot,(%sr0, va)
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1431,7 +1453,7 @@ itlb_miss_20:
iitlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1451,7 +1473,7 @@ naitlb_miss_20:
iitlbt pte,prot
ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1460,6 +1482,7 @@ naitlb_check_alias_20:
iitlbt pte,prot
insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop
@ -1481,7 +1504,7 @@ dbit_trap_20w:
idtlbt pte,prot
ptl_unlock0 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
#else
@ -1507,7 +1530,7 @@ dbit_trap_11:
mtsp t1, %sr1 /* Restore sr1 */
ptl_unlock0 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
@ -1527,7 +1550,7 @@ dbit_trap_20:
idtlbt pte,prot
ptl_unlock0 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
#endif

View File

@ -78,12 +78,12 @@ static unsigned long pdc_result[NUM_PDC_RESULT] __aligned(8);
static unsigned long pdc_result2[NUM_PDC_RESULT] __aligned(8);
#ifdef CONFIG_64BIT
#define WIDE_FIRMWARE 0x1
#define NARROW_FIRMWARE 0x2
#define WIDE_FIRMWARE PDC_MODEL_OS64
#define NARROW_FIRMWARE PDC_MODEL_OS32
/* Firmware needs to be initially set to narrow to determine the
/* Firmware needs to be initially set to narrow to determine the
* actual firmware width. */
int parisc_narrow_firmware __ro_after_init = 2;
int parisc_narrow_firmware __ro_after_init = NARROW_FIRMWARE;
#endif
/* On most currently-supported platforms, IODC I/O calls are 32-bit calls
@ -166,10 +166,10 @@ void set_firmware_width_unlocked(void)
if (pdc_result[0] != NARROW_FIRMWARE)
parisc_narrow_firmware = 0;
}
/**
* set_firmware_width - Determine if the firmware is wide or narrow.
*
*
* This function must be called before any pdc_* function that uses the
* convert_to_wide function.
*/
@ -178,7 +178,7 @@ void set_firmware_width(void)
unsigned long flags;
/* already initialized? */
if (parisc_narrow_firmware != 2)
if (parisc_narrow_firmware != NARROW_FIRMWARE)
return;
spin_lock_irqsave(&pdc_lock, flags);

View File

@ -242,9 +242,9 @@ void __init collect_boot_cpu_data(void)
/* get CPU-Model Information... */
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
printk(KERN_INFO
"model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
printk(KERN_INFO
"model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9]);
add_device_randomness(&boot_cpu_data.pdc.model,
sizeof(boot_cpu_data.pdc.model));

View File

@ -100,9 +100,6 @@ static void __init dma_ops_init(void)
void __init setup_arch(char **cmdline_p)
{
#ifdef CONFIG_64BIT
extern int parisc_narrow_firmware;
#endif
unwind_init();
init_per_cpu(smp_processor_id()); /* Set Modes & Enable FP */

View File

@ -404,13 +404,7 @@ alive:
void __init smp_prepare_boot_cpu(void)
{
int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;
/* Setup BSP mappings */
printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);
set_cpu_online(bootstrap_processor, true);
set_cpu_present(bootstrap_processor, true);
pr_info("SMP: bootstrap CPU ID is 0\n");
}

View File

@ -38,7 +38,7 @@ static struct _parisc_agp_info {
int lba_cap_offset;
u64 *gatt;
__le64 *gatt;
u64 gatt_entries;
u64 gart_base;
@ -104,7 +104,7 @@ parisc_agp_create_gatt_table(struct agp_bridge_data *bridge)
int i;
for (i = 0; i < info->gatt_entries; i++) {
info->gatt[i] = (unsigned long)agp_bridge->scratch_page;
info->gatt[i] = cpu_to_le64(agp_bridge->scratch_page);
}
return 0;
@ -158,9 +158,9 @@ parisc_agp_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
for (k = 0;
k < info->io_pages_per_kpage;
k++, j++, paddr += info->io_page_size) {
info->gatt[j] =
info->gatt[j] = cpu_to_le64(
parisc_agp_mask_memory(agp_bridge,
paddr, type);
paddr, type));
asm_io_fdc(&info->gatt[j]);
}
}
@ -184,7 +184,7 @@ parisc_agp_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
io_pg_start = info->io_pages_per_kpage * pg_start;
io_pg_count = info->io_pages_per_kpage * mem->page_count;
for (i = io_pg_start; i < io_pg_count + io_pg_start; i++) {
info->gatt[i] = agp_bridge->scratch_page;
info->gatt[i] = cpu_to_le64(agp_bridge->scratch_page);
}
agp_bridge->driver->tlb_flush(mem);
@ -204,7 +204,8 @@ parisc_agp_mask_memory(struct agp_bridge_data *bridge, dma_addr_t addr,
pa |= (ci >> PAGE_SHIFT) & 0xff;/* move CI (8 bits) into lowest byte */
pa |= SBA_PDIR_VALID_BIT; /* set "valid" bit */
return cpu_to_le64(pa);
/* return native (big-endian) PDIR entry */
return pa;
}
static void
@ -251,7 +252,8 @@ static int __init
agp_ioc_init(void __iomem *ioc_regs)
{
struct _parisc_agp_info *info = &parisc_agp_info;
u64 iova_base, *io_pdir, io_tlb_ps;
u64 iova_base, io_tlb_ps;
__le64 *io_pdir;
int io_tlb_shift;
printk(KERN_INFO DRVPFX "IO PDIR shared with sba_iommu\n");

View File

@ -1,38 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* linux/drivers/parisc/power.c
* HP PARISC soft power switch support driver
*
* Copyright (c) 2001-2007 Helge Deller <deller@gmx.de>
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL").
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* HP PARISC soft power switch driver
*
* Copyright (c) 2001-2023 Helge Deller <deller@gmx.de>
*
* HINT:
* Support of the soft power switch button may be enabled or disabled at
* runtime through the "/proc/sys/kernel/power" procfs entry.
*/
*/
#include <linux/module.h>
#include <linux/init.h>
@ -62,12 +37,12 @@
#define MFCPU_X(rDiagReg, t_ch, t_th, code) \
(DIAG_CODE(code) + ((rDiagReg)<<21) + ((t_ch)<<16) + ((t_th)<<0) )
#define MTCPU(dr, gr) MFCPU_X(dr, gr, 0, 0x12) /* move value of gr to dr[dr] */
#define MFCPU_C(dr, gr) MFCPU_X(dr, gr, 0, 0x30) /* for dr0 and dr8 only ! */
#define MFCPU_T(dr, gr) MFCPU_X(dr, 0, gr, 0xa0) /* all dr except dr0 and dr8 */
#define __getDIAG(dr) ( { \
#define __getDIAG(dr) ( { \
register unsigned long __res asm("r28");\
__asm__ __volatile__ ( \
".word %1" : "=&r" (__res) : "i" (MFCPU_T(dr,28) ) \
@ -85,7 +60,7 @@ static void process_shutdown(void)
printk(KERN_ALERT KTHREAD_NAME ": Shutdown requested...\n");
shutdown_timer++;
/* wait until the button was pressed for 1 second */
if (shutdown_timer == (POWERSWITCH_DOWN_SEC*POWERSWITCH_POLL_PER_SEC)) {
static const char msg[] = "Shutting down...";
@ -135,7 +110,7 @@ static int kpowerswd(void *param)
button_not_pressed = (gsc_readl(soft_power_reg) & 0x1);
} else {
/*
* On gecko style machines (e.g. 712/xx and 715/xx)
* On gecko style machines (e.g. 712/xx and 715/xx)
* the power switch status is stored in Bit 0 ("the highest bit")
* of CPU diagnose register 25.
* Warning: Some machines never reset the DIAG flag, even if
@ -161,7 +136,7 @@ static int kpowerswd(void *param)
/*
* powerfail interruption handler (irq IRQ_FROM_REGION(CPU_IRQ_REGION)+2)
* powerfail interruption handler (irq IRQ_FROM_REGION(CPU_IRQ_REGION)+2)
*/
#if 0
static void powerfail_interrupt(int code, void *x)
@ -197,6 +172,14 @@ static struct notifier_block parisc_panic_block = {
.priority = INT_MAX,
};
/* qemu soft power-off function */
static int qemu_power_off(struct sys_off_data *data)
{
/* this turns the system off via SeaBIOS */
*(int *)data->cb_data = 0;
pdc_soft_power_button(1);
return NOTIFY_DONE;
}
static int __init power_init(void)
{
@ -214,19 +197,25 @@ static int __init power_init(void)
ret = pdc_soft_power_button(1);
if (ret != PDC_OK)
soft_power_reg = -1UL;
switch (soft_power_reg) {
case 0: printk(KERN_INFO DRIVER_NAME ": Gecko-style soft power switch enabled.\n");
break;
case -1UL: printk(KERN_INFO DRIVER_NAME ": Soft power switch support not available.\n");
return -ENODEV;
default: printk(KERN_INFO DRIVER_NAME ": Soft power switch at 0x%08lx enabled.\n",
soft_power_reg);
}
power_task = kthread_run(kpowerswd, (void*)soft_power_reg, KTHREAD_NAME);
power_task = NULL;
if (running_on_qemu && soft_power_reg)
register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, SYS_OFF_PRIO_DEFAULT,
qemu_power_off, (void *)soft_power_reg);
else
power_task = kthread_run(kpowerswd, (void*)soft_power_reg,
KTHREAD_NAME);
if (IS_ERR(power_task)) {
printk(KERN_ERR DRIVER_NAME ": thread creation failed. Driver not loaded.\n");
pdc_soft_power_button(0);

View File

@ -2007,7 +2007,7 @@ void * sba_get_iommu(struct parisc_device *pci_hba)
struct parisc_device *sba_dev = parisc_parent(pci_hba);
struct sba_device *sba = dev_get_drvdata(&sba_dev->dev);
char t = sba_dev->id.hw_type;
int iocnum = (pci_hba->hw_path >> 3); /* rope # */
int iocnum = (pci_hba->hw_path >> 3); /* IOC # */
WARN_ON((t != HPHW_IOA) && (t != HPHW_BCPORT));

View File

@ -232,7 +232,7 @@ struct sti_rom_font {
u8 height;
u8 font_type; /* language type */
u8 bytes_per_char;
u32 next_font;
s32 next_font; /* note: signed int */
u8 underline_height;
u8 underline_pos;
u8 res008[2];