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mtd: rawnand: omap2: Use nand_controller_init()
Stop initializing omap_gpmc_controller fields are declaration time and replace that by a call to nand_controller_init(). Since the same object might be shared by several NAND chips and the NAND controller driver expects a ->probe() per-chip, we need to keep track of the omap_gpmc_controller state (whether it's already been initialized or not). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -2173,11 +2173,8 @@ static const struct nand_controller_ops omap_nand_controller_ops = {
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};
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/* Shared among all NAND instances to synchronize access to the ECC Engine */
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static struct nand_controller omap_gpmc_controller = {
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.lock = __SPIN_LOCK_UNLOCKED(omap_gpmc_controller.lock),
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.wq = __WAIT_QUEUE_HEAD_INITIALIZER(omap_gpmc_controller.wq),
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.ops = &omap_nand_controller_ops,
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};
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static struct nand_controller omap_gpmc_controller;
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static bool omap_gpmc_controller_initialized;
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static int omap_nand_probe(struct platform_device *pdev)
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{
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@ -2227,6 +2224,12 @@ static int omap_nand_probe(struct platform_device *pdev)
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info->phys_base = res->start;
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if (!omap_gpmc_controller_initialized) {
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omap_gpmc_controller.ops = &omap_nand_controller_ops;
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nand_controller_init(&omap_gpmc_controller);
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omap_gpmc_controller_initialized = true;
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}
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nand_chip->controller = &omap_gpmc_controller;
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nand_chip->legacy.IO_ADDR_W = nand_chip->legacy.IO_ADDR_R;
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