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synced 2024-11-19 18:24:14 +08:00
drm/tegra: dsi: Implement runtime PM
Use runtime PM to clock-(un)gate, (de)assert reset and control power to the DSI controller. This ties in nicely with atomic DPMS in that a runtime PM reference is taken before a pipe is enabled and dropped after it has been shut down. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
parent
33a8eb8d40
commit
ef8187d752
@ -13,6 +13,7 @@
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/regulator/consumer.h>
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@ -677,6 +678,45 @@ static void tegra_dsi_ganged_disable(struct tegra_dsi *dsi)
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tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_CONTROL);
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}
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static int tegra_dsi_pad_enable(struct tegra_dsi *dsi)
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{
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u32 value;
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value = DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0);
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tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0);
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return 0;
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}
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static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)
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{
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u32 value;
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/*
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* XXX Is this still needed? The module reset is deasserted right
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* before this function is called.
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*/
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4);
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/* start calibration */
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tegra_dsi_pad_enable(dsi);
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value = DSI_PAD_SLEW_UP(0x7) | DSI_PAD_SLEW_DN(0x7) |
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DSI_PAD_LP_UP(0x1) | DSI_PAD_LP_DN(0x1) |
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DSI_PAD_OUT_CLK(0x0);
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tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2);
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value = DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) |
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DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3);
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tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);
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return tegra_mipi_calibrate(dsi->mipi);
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}
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static void tegra_dsi_set_timeout(struct tegra_dsi *dsi, unsigned long bclk,
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unsigned int vrefresh)
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{
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@ -837,7 +877,7 @@ static void tegra_dsi_encoder_disable(struct drm_encoder *encoder)
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tegra_dsi_disable(dsi);
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return;
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pm_runtime_put(dsi->dev);
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}
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static void tegra_dsi_encoder_enable(struct drm_encoder *encoder)
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@ -848,6 +888,13 @@ static void tegra_dsi_encoder_enable(struct drm_encoder *encoder)
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struct tegra_dsi *dsi = to_dsi(output);
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struct tegra_dsi_state *state;
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u32 value;
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int err;
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pm_runtime_get_sync(dsi->dev);
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err = tegra_dsi_pad_calibrate(dsi);
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if (err < 0)
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dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);
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state = tegra_dsi_get_state(dsi);
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@ -876,8 +923,6 @@ static void tegra_dsi_encoder_enable(struct drm_encoder *encoder)
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if (output->panel)
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drm_panel_enable(output->panel);
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return;
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}
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static int
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@ -967,55 +1012,12 @@ static const struct drm_encoder_helper_funcs tegra_dsi_encoder_helper_funcs = {
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.atomic_check = tegra_dsi_encoder_atomic_check,
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};
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static int tegra_dsi_pad_enable(struct tegra_dsi *dsi)
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{
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u32 value;
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value = DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0);
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tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0);
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return 0;
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}
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static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)
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{
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u32 value;
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3);
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tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4);
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/* start calibration */
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tegra_dsi_pad_enable(dsi);
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value = DSI_PAD_SLEW_UP(0x7) | DSI_PAD_SLEW_DN(0x7) |
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DSI_PAD_LP_UP(0x1) | DSI_PAD_LP_DN(0x1) |
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DSI_PAD_OUT_CLK(0x0);
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tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2);
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value = DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) |
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DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3);
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tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);
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return tegra_mipi_calibrate(dsi->mipi);
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}
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static int tegra_dsi_init(struct host1x_client *client)
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{
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struct drm_device *drm = dev_get_drvdata(client->parent);
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struct tegra_dsi *dsi = host1x_client_to_dsi(client);
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int err;
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reset_control_deassert(dsi->rst);
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err = tegra_dsi_pad_calibrate(dsi);
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if (err < 0) {
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dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);
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goto reset;
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}
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/* Gangsters must not register their own outputs. */
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if (!dsi->master) {
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dsi->output.dev = client->dev;
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@ -1038,12 +1040,9 @@ static int tegra_dsi_init(struct host1x_client *client)
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drm_connector_register(&dsi->output.connector);
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err = tegra_output_init(drm, &dsi->output);
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if (err < 0) {
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dev_err(client->dev,
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"failed to initialize output: %d\n",
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if (err < 0)
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dev_err(dsi->dev, "failed to initialize output: %d\n",
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err);
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goto reset;
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}
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dsi->output.encoder.possible_crtcs = 0x3;
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}
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@ -1055,10 +1054,6 @@ static int tegra_dsi_init(struct host1x_client *client)
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}
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return 0;
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reset:
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reset_control_assert(dsi->rst);
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return err;
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}
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static int tegra_dsi_exit(struct host1x_client *client)
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@ -1070,7 +1065,7 @@ static int tegra_dsi_exit(struct host1x_client *client)
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if (IS_ENABLED(CONFIG_DEBUG_FS))
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tegra_dsi_debugfs_exit(dsi);
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reset_control_assert(dsi->rst);
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regulator_disable(dsi->vdd);
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return 0;
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}
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@ -1501,67 +1496,41 @@ static int tegra_dsi_probe(struct platform_device *pdev)
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dsi->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(dsi->clk)) {
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dev_err(&pdev->dev, "cannot get DSI clock\n");
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err = PTR_ERR(dsi->clk);
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goto reset;
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}
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err = clk_prepare_enable(dsi->clk);
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if (err < 0) {
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dev_err(&pdev->dev, "cannot enable DSI clock\n");
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goto reset;
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return PTR_ERR(dsi->clk);
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}
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dsi->clk_lp = devm_clk_get(&pdev->dev, "lp");
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if (IS_ERR(dsi->clk_lp)) {
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dev_err(&pdev->dev, "cannot get low-power clock\n");
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err = PTR_ERR(dsi->clk_lp);
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goto disable_clk;
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}
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err = clk_prepare_enable(dsi->clk_lp);
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if (err < 0) {
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dev_err(&pdev->dev, "cannot enable low-power clock\n");
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goto disable_clk;
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return PTR_ERR(dsi->clk_lp);
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}
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dsi->clk_parent = devm_clk_get(&pdev->dev, "parent");
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if (IS_ERR(dsi->clk_parent)) {
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dev_err(&pdev->dev, "cannot get parent clock\n");
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err = PTR_ERR(dsi->clk_parent);
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goto disable_clk_lp;
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return PTR_ERR(dsi->clk_parent);
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}
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dsi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi");
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if (IS_ERR(dsi->vdd)) {
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dev_err(&pdev->dev, "cannot get VDD supply\n");
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err = PTR_ERR(dsi->vdd);
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goto disable_clk_lp;
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}
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err = regulator_enable(dsi->vdd);
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if (err < 0) {
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dev_err(&pdev->dev, "cannot enable VDD supply\n");
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goto disable_clk_lp;
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return PTR_ERR(dsi->vdd);
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}
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err = tegra_dsi_setup_clocks(dsi);
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if (err < 0) {
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dev_err(&pdev->dev, "cannot setup clocks\n");
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goto disable_vdd;
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return err;
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}
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dsi->regs = devm_ioremap_resource(&pdev->dev, regs);
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if (IS_ERR(dsi->regs)) {
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err = PTR_ERR(dsi->regs);
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goto disable_vdd;
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}
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if (IS_ERR(dsi->regs))
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return PTR_ERR(dsi->regs);
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dsi->mipi = tegra_mipi_request(&pdev->dev);
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if (IS_ERR(dsi->mipi)) {
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err = PTR_ERR(dsi->mipi);
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goto disable_vdd;
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}
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if (IS_ERR(dsi->mipi))
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return PTR_ERR(dsi->mipi);
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dsi->host.ops = &tegra_dsi_host_ops;
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dsi->host.dev = &pdev->dev;
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@ -1572,6 +1541,9 @@ static int tegra_dsi_probe(struct platform_device *pdev)
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goto mipi_free;
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}
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platform_set_drvdata(pdev, dsi);
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pm_runtime_enable(&pdev->dev);
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INIT_LIST_HEAD(&dsi->client.list);
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dsi->client.ops = &dsi_client_ops;
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dsi->client.dev = &pdev->dev;
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@ -1583,22 +1555,12 @@ static int tegra_dsi_probe(struct platform_device *pdev)
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goto unregister;
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}
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platform_set_drvdata(pdev, dsi);
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return 0;
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unregister:
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mipi_dsi_host_unregister(&dsi->host);
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mipi_free:
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tegra_mipi_free(dsi->mipi);
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disable_vdd:
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regulator_disable(dsi->vdd);
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disable_clk_lp:
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clk_disable_unprepare(dsi->clk_lp);
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disable_clk:
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clk_disable_unprepare(dsi->clk);
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reset:
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reset_control_assert(dsi->rst);
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return err;
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}
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@ -1607,6 +1569,8 @@ static int tegra_dsi_remove(struct platform_device *pdev)
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struct tegra_dsi *dsi = platform_get_drvdata(pdev);
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int err;
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pm_runtime_disable(&pdev->dev);
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err = host1x_client_unregister(&dsi->client);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
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@ -1619,14 +1583,78 @@ static int tegra_dsi_remove(struct platform_device *pdev)
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mipi_dsi_host_unregister(&dsi->host);
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tegra_mipi_free(dsi->mipi);
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regulator_disable(dsi->vdd);
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return 0;
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}
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#ifdef CONFIG_PM
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static int tegra_dsi_suspend(struct device *dev)
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{
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struct tegra_dsi *dsi = dev_get_drvdata(dev);
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int err;
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err = reset_control_assert(dsi->rst);
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if (err < 0) {
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dev_err(dev, "failed to assert reset: %d\n", err);
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return err;
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}
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usleep_range(1000, 2000);
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clk_disable_unprepare(dsi->clk_lp);
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clk_disable_unprepare(dsi->clk);
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reset_control_assert(dsi->rst);
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regulator_disable(dsi->vdd);
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return 0;
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}
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static int tegra_dsi_resume(struct device *dev)
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{
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struct tegra_dsi *dsi = dev_get_drvdata(dev);
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int err;
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err = regulator_enable(dsi->vdd);
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if (err < 0) {
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dev_err(dsi->dev, "failed to enable VDD supply: %d\n", err);
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return err;
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}
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err = clk_prepare_enable(dsi->clk);
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if (err < 0) {
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dev_err(dev, "cannot enable DSI clock: %d\n", err);
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goto disable_vdd;
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}
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err = clk_prepare_enable(dsi->clk_lp);
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if (err < 0) {
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dev_err(dev, "cannot enable low-power clock: %d\n", err);
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goto disable_clk;
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}
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usleep_range(1000, 2000);
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err = reset_control_deassert(dsi->rst);
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if (err < 0) {
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dev_err(dev, "cannot assert reset: %d\n", err);
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goto disable_clk_lp;
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}
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return 0;
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disable_clk_lp:
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clk_disable_unprepare(dsi->clk_lp);
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disable_clk:
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clk_disable_unprepare(dsi->clk);
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disable_vdd:
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regulator_disable(dsi->vdd);
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return err;
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}
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#endif
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static const struct dev_pm_ops tegra_dsi_pm_ops = {
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SET_RUNTIME_PM_OPS(tegra_dsi_suspend, tegra_dsi_resume, NULL)
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};
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static const struct of_device_id tegra_dsi_of_match[] = {
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{ .compatible = "nvidia,tegra210-dsi", },
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{ .compatible = "nvidia,tegra132-dsi", },
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@ -1640,6 +1668,7 @@ struct platform_driver tegra_dsi_driver = {
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.driver = {
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.name = "tegra-dsi",
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.of_match_table = tegra_dsi_of_match,
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.pm = &tegra_dsi_pm_ops,
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},
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.probe = tegra_dsi_probe,
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.remove = tegra_dsi_remove,
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