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MIPS: Clear upper bits of FP registers on emulator writes
The upper bits of an FP register are architecturally defined as unpredictable following an instructions which only writes the lower bits. The prior behaviour of the kernel is to leave them unmodified. This patch modifies that to clear the upper bits to zero. This is what the MSA architecture reference manual specifies should happen for its wider registers and is still permissible for scalar FP instructions given the bits unpredictability there. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: sergei.shtylyov@cogentembedded.com Patchwork: https://patchwork.linux-mips.org/patch/6435/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -884,20 +884,35 @@ static inline int cop1_64bit(struct pt_regs *xcp)
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} while (0)
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#define SITOREG(si, x) do { \
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if (cop1_64bit(xcp)) \
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if (cop1_64bit(xcp)) { \
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unsigned i; \
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set_fpr32(&ctx->fpr[x], 0, si); \
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else \
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for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
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set_fpr32(&ctx->fpr[x], i, 0); \
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} else { \
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set_fpr32(&ctx->fpr[(x) & ~1], (x) & 1, si); \
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} \
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} while (0)
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#define SIFROMHREG(si, x) ((si) = get_fpr32(&ctx->fpr[x], 1))
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#define SITOHREG(si, x) set_fpr32(&ctx->fpr[x], 1, si)
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#define SITOHREG(si, x) do { \
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unsigned i; \
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set_fpr32(&ctx->fpr[x], 1, si); \
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for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
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set_fpr32(&ctx->fpr[x], i, 0); \
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} while (0)
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#define DIFROMREG(di, x) \
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((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) == 0)], 0))
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#define DITOREG(di, x) \
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set_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) == 0)], 0, di)
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#define DITOREG(di, x) do { \
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unsigned fpr, i; \
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fpr = (x) & ~(cop1_64bit(xcp) == 0); \
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set_fpr64(&ctx->fpr[fpr], 0, di); \
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for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val64); i++) \
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set_fpr64(&ctx->fpr[fpr], i, 0); \
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} while (0)
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#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
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#define SPTOREG(sp, x) SITOREG((sp).bits, x)
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