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crypto: inside-secure - optimize DSE bufferability control
Configure the data write bufferability to always buffer packets in the DSE. This change slightly improves performance. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -329,6 +329,7 @@ static int safexcel_hw_init(struct safexcel_crypto_priv *priv)
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val = EIP197_HIA_DSE_CFG_DIS_DEBUG;
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val |= EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(7) | EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(8);
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val |= EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(WR_CACHE_3BITS);
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val |= EIP197_HIA_DSE_CFG_ALLWAYS_BUFFERABLE;
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val |= EIP197_HIA_DSE_CFG_EN_SINGLE_WR;
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writel(val, priv->base + EIP197_HIA_DSE_CFG);
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@ -139,6 +139,7 @@
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#define EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(n) ((n) << 0)
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#define EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(n) (((n) & 0x7) << 4)
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#define EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(n) ((n) << 8)
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#define EIP197_HIA_DSE_CFG_ALLWAYS_BUFFERABLE GENMASK(15, 14)
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#define EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(n) ((n) << 16)
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#define EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL(n) (((n) & 0x7) << 20)
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#define EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(n) ((n) << 24)
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