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ARM: dts: r8a7793: Convert to new LVDS DT bindings
The internal LVDS encoder now has DT bindings separate from the DU. Port the device tree over to the new model. Fixes:c6a27fa41f
("drm: rcar-du: Convert LVDS encoder code to bridge driver") Fixes:bff8f8c2fe
("ARM: dts: r8a7793: add soc node") Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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e5c3f4707f
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@ -447,10 +447,9 @@
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pinctrl-names = "default";
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status = "okay";
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
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<&x13_clk>, <&x2_clk>;
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clock-names = "du.0", "du.1", "lvds.0",
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"dclkin.0", "dclkin.1";
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clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
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ports {
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port@0 {
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@ -458,6 +457,11 @@
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remote-endpoint = <&adv7511_in>;
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};
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};
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};
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};
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&lvds0 {
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ports {
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port@1 {
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lvds_connector: endpoint {
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};
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@ -1292,15 +1292,12 @@
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du: display@feb00000 {
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compatible = "renesas,du-r8a7793";
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reg = <0 0xfeb00000 0 0x40000>,
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<0 0xfeb90000 0 0x1c>;
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reg-names = "du", "lvds.0";
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reg = <0 0xfeb00000 0 0x40000>;
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 726>;
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clock-names = "du.0", "du.1", "lvds.0";
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<&cpg CPG_MOD 723>;
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clock-names = "du.0", "du.1";
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status = "disabled";
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ports {
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@ -1315,6 +1312,34 @@
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port@1 {
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reg = <1>;
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du_out_lvds0: endpoint {
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remote-endpoint = <&lvds0_in>;
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};
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};
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};
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};
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lvds0: lvds@feb90000 {
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compatible = "renesas,r8a7793-lvds";
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reg = <0 0xfeb90000 0 0x1c>;
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clocks = <&cpg CPG_MOD 726>;
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power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
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resets = <&cpg 726>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds0_in: endpoint {
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remote-endpoint = <&du_out_lvds0>;
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};
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};
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port@1 {
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reg = <1>;
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lvds0_out: endpoint {
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};
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};
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};
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