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pinctrl: sh-pfc: r8a7794: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -2625,6 +2625,21 @@ static const unsigned int scifb2_ctrl_pins[] = {
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static const unsigned int scifb2_ctrl_mux[] = {
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SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK,
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};
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/* - SCIF Clock ------------------------------------------------------------- */
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static const unsigned int scif_clk_pins[] = {
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/* SCIF_CLK */
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RCAR_GP_PIN(1, 23),
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};
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static const unsigned int scif_clk_mux[] = {
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SCIF_CLK_MARK,
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};
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static const unsigned int scif_clk_b_pins[] = {
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/* SCIF_CLK */
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RCAR_GP_PIN(3, 29),
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};
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static const unsigned int scif_clk_b_mux[] = {
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SCIF_CLK_B_MARK,
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};
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/* - SDHI0 ------------------------------------------------------------------ */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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@ -3052,6 +3067,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(scifb2_data),
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SH_PFC_PIN_GROUP(scifb2_clk),
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SH_PFC_PIN_GROUP(scifb2_ctrl),
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SH_PFC_PIN_GROUP(scif_clk),
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SH_PFC_PIN_GROUP(scif_clk_b),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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@ -3335,6 +3352,11 @@ static const char * const scifb2_groups[] = {
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"scifb2_ctrl",
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};
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static const char * const scif_clk_groups[] = {
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"scif_clk",
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"scif_clk_b",
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};
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static const char * const sdhi0_groups[] = {
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"sdhi0_data1",
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"sdhi0_data4",
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@ -3422,6 +3444,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(scifb0),
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SH_PFC_FUNCTION(scifb1),
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SH_PFC_FUNCTION(scifb2),
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SH_PFC_FUNCTION(scif_clk),
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi2),
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