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radeon: insert 10ms sleep in dce5_crtc_load_lut
Per at least one tester this is enough magic to recover the regression
introduced for some people (but not all) in
commit b8e2b0199c
Author: Peter Rosin <peda@axentia.se>
Date: Tue Jul 4 12:36:57 2017 +0200
drm/fb-helper: factor out pseudo-palette
which for radeon had the side-effect of refactoring out a seemingly
redudant writing of the color palette.
10ms in a fairly slow modeset path feels like an acceptable form of
duct-tape, so maybe worth a shot and see what sticks.
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
References: https://bugzilla.kernel.org/show_bug.cgi?id=198123
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
2a239597df
commit
ec3d65082d
@ -127,6 +127,8 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
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DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
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msleep(10);
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WREG32(NI_INPUT_CSC_CONTROL + radeon_crtc->crtc_offset,
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(NI_INPUT_CSC_GRPH_MODE(NI_INPUT_CSC_BYPASS) |
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NI_INPUT_CSC_OVL_MODE(NI_INPUT_CSC_BYPASS)));
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