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arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h
The defines for SVCR call it SVCR_EL0 however the architecture calls the register SVCR with no _EL0 suffix. In preparation for generating the sysreg definitions rename to match the architecture, no functional change. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220510161208.631259-6-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -67,12 +67,12 @@ extern void fpsimd_save_and_flush_cpu_state(void);
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static inline bool thread_sm_enabled(struct thread_struct *thread)
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{
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return system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK);
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return system_supports_sme() && (thread->svcr & SVCR_SM_MASK);
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}
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static inline bool thread_za_enabled(struct thread_struct *thread)
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{
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return system_supports_sme() && (thread->svcr & SVCR_EL0_ZA_MASK);
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return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK);
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}
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/* Maximum VL that SVE/SME VL-agnostic software can transparently support */
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@ -192,7 +192,7 @@ static inline unsigned int thread_get_sme_vl(struct thread_struct *thread)
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static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)
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{
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if (system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK))
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if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK))
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return thread_get_sme_vl(thread);
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else
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return thread_get_sve_vl(thread);
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@ -479,9 +479,9 @@
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#define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0)
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#define SYS_RNDRRS_EL0 sys_reg(3, 3, 2, 4, 1)
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#define SYS_SVCR_EL0 sys_reg(3, 3, 4, 2, 2)
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#define SVCR_EL0_ZA_MASK 2
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#define SVCR_EL0_SM_MASK 1
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#define SYS_SVCR sys_reg(3, 3, 4, 2, 2)
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#define SVCR_ZA_MASK 2
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#define SVCR_SM_MASK 1
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#define SYS_PMCR_EL0 sys_reg(3, 3, 9, 12, 0)
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#define SYS_PMCNTENSET_EL0 sys_reg(3, 3, 9, 12, 1)
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@ -410,7 +410,7 @@ static void task_fpsimd_load(void)
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if (test_thread_flag(TIF_SME))
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sme_set_vq(sve_vq_from_vl(sme_vl) - 1);
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write_sysreg_s(current->thread.svcr, SYS_SVCR_EL0);
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write_sysreg_s(current->thread.svcr, SYS_SVCR);
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if (thread_za_enabled(¤t->thread))
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za_load_state(current->thread.za_state);
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@ -462,15 +462,15 @@ static void fpsimd_save(void)
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if (system_supports_sme()) {
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u64 *svcr = last->svcr;
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*svcr = read_sysreg_s(SYS_SVCR_EL0);
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*svcr = read_sysreg_s(SYS_SVCR);
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*svcr = read_sysreg_s(SYS_SVCR_EL0);
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*svcr = read_sysreg_s(SYS_SVCR);
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if (*svcr & SYS_SVCR_EL0_ZA_MASK)
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if (*svcr & SVCR_ZA_MASK)
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za_save_state(last->za_state);
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/* If we are in streaming mode override regular SVE. */
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if (*svcr & SYS_SVCR_EL0_SM_MASK) {
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if (*svcr & SVCR_SM_MASK) {
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save_sve_regs = true;
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save_ffr = system_supports_fa64();
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vl = last->sme_vl;
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@ -852,8 +852,8 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
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sve_to_fpsimd(task);
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if (system_supports_sme() && type == ARM64_VEC_SME) {
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task->thread.svcr &= ~(SYS_SVCR_EL0_SM_MASK |
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SYS_SVCR_EL0_ZA_MASK);
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task->thread.svcr &= ~(SVCR_SM_MASK |
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SVCR_ZA_MASK);
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clear_thread_flag(TIF_SME);
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}
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@ -1915,10 +1915,10 @@ void __efi_fpsimd_begin(void)
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__this_cpu_write(efi_sve_state_used, true);
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if (system_supports_sme()) {
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svcr = read_sysreg_s(SYS_SVCR_EL0);
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svcr = read_sysreg_s(SYS_SVCR);
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if (!system_supports_fa64())
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ffr = svcr & SVCR_EL0_SM_MASK;
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ffr = svcr & SVCR_SM_MASK;
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__this_cpu_write(efi_sm_state, ffr);
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}
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@ -1928,8 +1928,8 @@ void __efi_fpsimd_begin(void)
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ffr);
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if (system_supports_sme())
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sysreg_clear_set_s(SYS_SVCR_EL0,
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SVCR_EL0_SM_MASK, 0);
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sysreg_clear_set_s(SYS_SVCR,
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SVCR_SM_MASK, 0);
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} else {
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fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
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@ -1962,9 +1962,9 @@ void __efi_fpsimd_end(void)
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*/
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if (system_supports_sme()) {
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if (__this_cpu_read(efi_sm_state)) {
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sysreg_clear_set_s(SYS_SVCR_EL0,
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sysreg_clear_set_s(SYS_SVCR,
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0,
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SVCR_EL0_SM_MASK);
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SVCR_SM_MASK);
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if (!system_supports_fa64())
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ffr = efi_sm_state;
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}
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@ -867,10 +867,10 @@ static int sve_set_common(struct task_struct *target,
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switch (type) {
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case ARM64_VEC_SVE:
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target->thread.svcr &= ~SYS_SVCR_EL0_SM_MASK;
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target->thread.svcr &= ~SVCR_SM_MASK;
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break;
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case ARM64_VEC_SME:
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target->thread.svcr |= SYS_SVCR_EL0_SM_MASK;
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target->thread.svcr |= SVCR_SM_MASK;
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break;
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default:
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WARN_ON_ONCE(1);
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@ -1100,7 +1100,7 @@ static int za_set(struct task_struct *target,
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/* If there is no data then disable ZA */
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if (!count) {
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target->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;
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target->thread.svcr &= ~SVCR_ZA_MASK;
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goto out;
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}
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@ -1125,7 +1125,7 @@ static int za_set(struct task_struct *target,
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/* Mark ZA as active and let userspace use it */
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set_tsk_thread_flag(target, TIF_SME);
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target->thread.svcr |= SYS_SVCR_EL0_ZA_MASK;
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target->thread.svcr |= SVCR_ZA_MASK;
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out:
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fpsimd_flush_task_state(target);
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@ -288,7 +288,7 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
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if (sve.head.size <= sizeof(*user->sve)) {
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clear_thread_flag(TIF_SVE);
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current->thread.svcr &= ~SYS_SVCR_EL0_SM_MASK;
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current->thread.svcr &= ~SVCR_SM_MASK;
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goto fpsimd_only;
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}
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@ -321,7 +321,7 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
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return -EFAULT;
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if (sve.flags & SVE_SIG_FLAG_SM)
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current->thread.svcr |= SYS_SVCR_EL0_SM_MASK;
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current->thread.svcr |= SVCR_SM_MASK;
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else
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set_thread_flag(TIF_SVE);
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@ -398,7 +398,7 @@ static int restore_za_context(struct user_ctxs __user *user)
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return -EINVAL;
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if (za.head.size <= sizeof(*user->za)) {
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current->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;
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current->thread.svcr &= ~SVCR_ZA_MASK;
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return 0;
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}
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@ -419,7 +419,7 @@ static int restore_za_context(struct user_ctxs __user *user)
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sme_alloc(current);
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if (!current->thread.za_state) {
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current->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;
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current->thread.svcr &= ~SVCR_ZA_MASK;
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clear_thread_flag(TIF_SME);
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return -ENOMEM;
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}
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@ -432,7 +432,7 @@ static int restore_za_context(struct user_ctxs __user *user)
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return -EFAULT;
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set_thread_flag(TIF_SME);
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current->thread.svcr |= SYS_SVCR_EL0_ZA_MASK;
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current->thread.svcr |= SVCR_ZA_MASK;
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return 0;
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}
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@ -922,8 +922,8 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
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/* Signal handlers are invoked with ZA and streaming mode disabled */
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if (system_supports_sme()) {
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current->thread.svcr &= ~(SYS_SVCR_EL0_ZA_MASK |
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SYS_SVCR_EL0_SM_MASK);
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current->thread.svcr &= ~(SVCR_ZA_MASK |
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SVCR_SM_MASK);
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sme_smstop();
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}
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@ -174,9 +174,9 @@ static inline void fp_user_discard(void)
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* need updating.
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*/
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if (system_supports_sme() && test_thread_flag(TIF_SME)) {
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u64 svcr = read_sysreg_s(SYS_SVCR_EL0);
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u64 svcr = read_sysreg_s(SYS_SVCR);
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if (svcr & SYS_SVCR_EL0_SM_MASK)
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if (svcr & SVCR_SM_MASK)
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sme_smstop_sm();
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}
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@ -96,8 +96,8 @@ void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu)
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if (read_sysreg(cpacr_el1) & CPACR_EL1_SMEN_EL0EN)
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vcpu->arch.flags |= KVM_ARM64_HOST_SME_ENABLED;
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if (read_sysreg_s(SYS_SVCR_EL0) &
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(SYS_SVCR_EL0_SM_MASK | SYS_SVCR_EL0_ZA_MASK)) {
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if (read_sysreg_s(SYS_SVCR) &
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(SVCR_SM_MASK | SVCR_ZA_MASK)) {
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vcpu->arch.flags &= ~KVM_ARM64_FP_HOST;
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fpsimd_save_and_flush_cpu_state();
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}
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@ -1685,7 +1685,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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{ SYS_DESC(SYS_SMIDR_EL1), undef_access },
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{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },
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{ SYS_DESC(SYS_CTR_EL0), access_ctr },
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{ SYS_DESC(SYS_SVCR_EL0), undef_access },
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{ SYS_DESC(SYS_SVCR), undef_access },
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{ PMU_SYS_REG(SYS_PMCR_EL0), .access = access_pmcr,
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.reset = reset_pmcr, .reg = PMCR_EL0 },
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