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MMC core:
- Allow non-sleeping read-only slot-gpio MMC host: - sdhci-pci-o2micro: Fix a warm reboot BIOS issue -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmXGHa4XHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmGGw/+Nz/YsApRWv2UigkK0iRYtowT XBmv5QaSN1iX9WkLG0S9BpuQVQFsPOglKbZX+p03AGD+ztYz2fwsJ807oaFlOkxy VzlYHAkKC0ELqwN81By1UErxyjxAsxe084JASQlO1Q4ibQ7rosXg0zwW1zxZly0F YFpd94a1wAZFl3Diq52iO/qidBSzCZ6JLuxKACRloNpeTVi5JSv9PMrliOCPd+cc 99VAZyqYQ1fZ0Tge8U/gHBOb5yY3Np4K7SOMT/kta3BrvaCLvN0WgoGKXTfzdOOx W2sdbl4dorYClKQhpfH+wpszXfyjaSkxpEiBRojM8Z7DROMdJjyE1LzUTeBaC97N NJj9gfJCLvakoUPnjZwf2gpDuP/6v+2Kf44oxF6Vp8o5zqv4l3ytllvRT+ExHzcV fOw0pdGXndLfeg7pgRjJoPEPIkmosVm33LgoOMXmnF+Kyi8jJN3/8m2TbSUwluIk kEvIKpe0rlq+qo2HvuuA62yrRzN09eh+3alHVFMxPp4xyAqT4mcf2qmXBKf31Po7 p+aFpIqE7tkhrKOBnJwN7mywI4gJ6JQi98ng9YdtykOZivZ0CdAYbD9j9j7/M1+g 31u329nEoZnigrvChqlpczIwKBkIDKC6NvBCo826OcmsQZRnARGY2Z/zM2t+S3zY Uskd3ooZskQqjcRnZwM= =lPmp -----END PGP SIGNATURE----- Merge tag 'mmc-v6.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: "MMC core: - Allow non-sleeping read-only slot-gpio MMC host: - sdhci-pci-o2micro: Fix a warm reboot BIOS issue" * tag 'mmc-v6.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: slot-gpio: Allow non-sleeping GPIO ro mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS
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commit
eb747bcc36
@ -75,11 +75,15 @@ EXPORT_SYMBOL(mmc_gpio_set_cd_irq);
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int mmc_gpio_get_ro(struct mmc_host *host)
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{
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struct mmc_gpio *ctx = host->slot.handler_priv;
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int cansleep;
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if (!ctx || !ctx->ro_gpio)
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return -ENOSYS;
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return gpiod_get_value_cansleep(ctx->ro_gpio);
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cansleep = gpiod_cansleep(ctx->ro_gpio);
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return cansleep ?
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gpiod_get_value_cansleep(ctx->ro_gpio) :
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gpiod_get_value(ctx->ro_gpio);
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}
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EXPORT_SYMBOL(mmc_gpio_get_ro);
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@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io
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return 0;
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}
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static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd)
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{
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struct sdhci_pci_chip *chip;
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struct sdhci_pci_slot *slot = sdhci_priv(host);
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u32 scratch_32 = 0;
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u8 scratch_8 = 0;
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chip = slot->chip;
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if (mode == MMC_POWER_OFF) {
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/* UnLock WP */
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pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
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scratch_8 &= 0x7f;
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pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
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/* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
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pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
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scratch_32 &= ~(O2_SD_SEL_DLL);
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pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
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/* Lock WP */
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pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
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scratch_8 |= 0x80;
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pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
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}
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sdhci_set_power(host, mode, vdd);
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}
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static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
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{
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struct sdhci_pci_chip *chip;
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@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = {
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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.set_power = sdhci_pci_o2_set_power,
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};
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const struct sdhci_pci_fixes sdhci_o2 = {
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