mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-02 00:24:12 +08:00
clk: qcom: gcc-msm8994: Use ARRAY_SIZE() for num_parents
Don't rely on the programmer to enter the name of array elements, since the computer can compute it with much less chance of making a mistake. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210923162645.23257-9-konrad.dybcio@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
parent
c09b80238c
commit
eb2d505834
@ -162,7 +162,7 @@ static struct clk_rcg2 ufs_axi_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "ufs_axi_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -182,7 +182,7 @@ static struct clk_rcg2 usb30_master_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "usb30_master_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -201,7 +201,7 @@ static struct clk_rcg2 blsp1_qup1_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup1_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -239,7 +239,7 @@ static struct clk_rcg2 blsp1_qup1_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup1_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -252,7 +252,7 @@ static struct clk_rcg2 blsp1_qup2_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup2_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -279,7 +279,7 @@ static struct clk_rcg2 blsp1_qup2_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup2_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -292,7 +292,7 @@ static struct clk_rcg2 blsp1_qup3_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup3_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -319,7 +319,7 @@ static struct clk_rcg2 blsp1_qup3_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup3_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -332,7 +332,7 @@ static struct clk_rcg2 blsp1_qup4_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup4_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -346,7 +346,7 @@ static struct clk_rcg2 blsp1_qup4_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup4_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -359,7 +359,7 @@ static struct clk_rcg2 blsp1_qup5_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup5_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -386,7 +386,7 @@ static struct clk_rcg2 blsp1_qup5_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup5_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -399,7 +399,7 @@ static struct clk_rcg2 blsp1_qup6_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup6_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -426,7 +426,7 @@ static struct clk_rcg2 blsp1_qup6_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_qup6_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -459,7 +459,7 @@ static struct clk_rcg2 blsp1_uart1_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_uart1_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -473,7 +473,7 @@ static struct clk_rcg2 blsp1_uart2_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_uart2_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -487,7 +487,7 @@ static struct clk_rcg2 blsp1_uart3_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_uart3_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -501,7 +501,7 @@ static struct clk_rcg2 blsp1_uart4_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_uart4_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -515,7 +515,7 @@ static struct clk_rcg2 blsp1_uart5_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_uart5_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -529,7 +529,7 @@ static struct clk_rcg2 blsp1_uart6_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp1_uart6_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -542,7 +542,7 @@ static struct clk_rcg2 blsp2_qup1_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup1_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -569,7 +569,7 @@ static struct clk_rcg2 blsp2_qup1_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup1_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -582,7 +582,7 @@ static struct clk_rcg2 blsp2_qup2_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup2_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -596,7 +596,7 @@ static struct clk_rcg2 blsp2_qup2_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup2_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -622,7 +622,7 @@ static struct clk_rcg2 blsp2_qup3_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup3_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -636,7 +636,7 @@ static struct clk_rcg2 blsp2_qup3_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup3_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -649,7 +649,7 @@ static struct clk_rcg2 blsp2_qup4_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup4_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -663,7 +663,7 @@ static struct clk_rcg2 blsp2_qup4_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup4_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -676,7 +676,7 @@ static struct clk_rcg2 blsp2_qup5_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup5_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -691,7 +691,7 @@ static struct clk_rcg2 blsp2_qup5_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup5_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -704,7 +704,7 @@ static struct clk_rcg2 blsp2_qup6_i2c_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup6_i2c_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -731,7 +731,7 @@ static struct clk_rcg2 blsp2_qup6_spi_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_qup6_spi_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -745,7 +745,7 @@ static struct clk_rcg2 blsp2_uart1_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_uart1_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -759,7 +759,7 @@ static struct clk_rcg2 blsp2_uart2_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_uart2_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -773,7 +773,7 @@ static struct clk_rcg2 blsp2_uart3_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_uart3_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -787,7 +787,7 @@ static struct clk_rcg2 blsp2_uart4_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_uart4_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -801,7 +801,7 @@ static struct clk_rcg2 blsp2_uart5_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_uart5_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -815,7 +815,7 @@ static struct clk_rcg2 blsp2_uart6_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "blsp2_uart6_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -836,7 +836,7 @@ static struct clk_rcg2 gp1_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gp1_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -857,7 +857,7 @@ static struct clk_rcg2 gp2_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gp2_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -878,7 +878,7 @@ static struct clk_rcg2 gp3_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gp3_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -969,7 +969,7 @@ static struct clk_rcg2 pdm2_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "pdm2_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -1007,7 +1007,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "sdcc1_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0_gpll4,
|
||||
.num_parents = 3,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll4),
|
||||
.ops = &clk_rcg2_floor_ops,
|
||||
},
|
||||
};
|
||||
@ -1032,7 +1032,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "sdcc2_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_floor_ops,
|
||||
},
|
||||
};
|
||||
@ -1046,7 +1046,7 @@ static struct clk_rcg2 sdcc3_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "sdcc3_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_floor_ops,
|
||||
},
|
||||
};
|
||||
@ -1060,7 +1060,7 @@ static struct clk_rcg2 sdcc4_apps_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "sdcc4_apps_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_floor_ops,
|
||||
},
|
||||
};
|
||||
@ -1099,7 +1099,7 @@ static struct clk_rcg2 usb30_mock_utmi_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "usb30_mock_utmi_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -1136,7 +1136,7 @@ static struct clk_rcg2 usb_hs_system_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "usb_hs_system_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user