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Merge branch 'mvpp2-fixes'
Marcin Wojtas says: ==================== Fixes for the network driver of Marvell Armada 375 SoC This is a set of three patches that fix long-lasting problems implemented in the initial support for the Armada 375 network controller. Due to an inappropriate concept of handling the per-CPU sent packets' processing on TX path the driver numerous problems occured, such as RCU stalls. Those have been fixed, of which details you can find in the commit logs. The patches were intensively tested on top of v4.2-rc5. I'm looking forward to any comments or remarks. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
ea70858423
@ -27,6 +27,8 @@
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#include <linux/of_address.h>
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#include <linux/phy.h>
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#include <linux/clk.h>
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#include <linux/hrtimer.h>
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#include <linux/ktime.h>
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#include <uapi/linux/ppp_defs.h>
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#include <net/ip.h>
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#include <net/ipv6.h>
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@ -299,6 +301,7 @@
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/* Coalescing */
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#define MVPP2_TXDONE_COAL_PKTS_THRESH 15
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#define MVPP2_TXDONE_HRTIMER_PERIOD_NS 1000000UL
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#define MVPP2_RX_COAL_PKTS 32
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#define MVPP2_RX_COAL_USEC 100
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@ -660,6 +663,14 @@ struct mvpp2_pcpu_stats {
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u64 tx_bytes;
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};
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/* Per-CPU port control */
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struct mvpp2_port_pcpu {
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struct hrtimer tx_done_timer;
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bool timer_scheduled;
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/* Tasklet for egress finalization */
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struct tasklet_struct tx_done_tasklet;
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};
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struct mvpp2_port {
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u8 id;
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@ -679,6 +690,9 @@ struct mvpp2_port {
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u32 pending_cause_rx;
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struct napi_struct napi;
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/* Per-CPU port control */
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struct mvpp2_port_pcpu __percpu *pcpu;
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/* Flags */
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unsigned long flags;
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@ -776,6 +790,9 @@ struct mvpp2_txq_pcpu {
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/* Array of transmitted skb */
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struct sk_buff **tx_skb;
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/* Array of transmitted buffers' physical addresses */
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dma_addr_t *tx_buffs;
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/* Index of last TX DMA descriptor that was inserted */
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int txq_put_index;
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@ -913,8 +930,6 @@ struct mvpp2_bm_pool {
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/* Occupied buffers indicator */
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atomic_t in_use;
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int in_use_thresh;
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spinlock_t lock;
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};
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struct mvpp2_buff_hdr {
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@ -963,9 +978,13 @@ static void mvpp2_txq_inc_get(struct mvpp2_txq_pcpu *txq_pcpu)
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}
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static void mvpp2_txq_inc_put(struct mvpp2_txq_pcpu *txq_pcpu,
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struct sk_buff *skb)
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struct sk_buff *skb,
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struct mvpp2_tx_desc *tx_desc)
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{
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txq_pcpu->tx_skb[txq_pcpu->txq_put_index] = skb;
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if (skb)
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txq_pcpu->tx_buffs[txq_pcpu->txq_put_index] =
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tx_desc->buf_phys_addr;
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txq_pcpu->txq_put_index++;
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if (txq_pcpu->txq_put_index == txq_pcpu->size)
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txq_pcpu->txq_put_index = 0;
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@ -3376,7 +3395,6 @@ static int mvpp2_bm_pool_create(struct platform_device *pdev,
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bm_pool->pkt_size = 0;
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bm_pool->buf_num = 0;
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atomic_set(&bm_pool->in_use, 0);
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spin_lock_init(&bm_pool->lock);
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return 0;
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}
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@ -3647,7 +3665,6 @@ static struct mvpp2_bm_pool *
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mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
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int pkt_size)
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{
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unsigned long flags = 0;
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struct mvpp2_bm_pool *new_pool = &port->priv->bm_pools[pool];
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int num;
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@ -3656,8 +3673,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
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return NULL;
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}
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spin_lock_irqsave(&new_pool->lock, flags);
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if (new_pool->type == MVPP2_BM_FREE)
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new_pool->type = type;
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@ -3686,8 +3701,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
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if (num != pkts_num) {
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WARN(1, "pool %d: %d of %d allocated\n",
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new_pool->id, num, pkts_num);
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/* We need to undo the bufs_add() allocations */
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spin_unlock_irqrestore(&new_pool->lock, flags);
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return NULL;
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}
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}
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@ -3695,15 +3708,12 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
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mvpp2_bm_pool_bufsize_set(port->priv, new_pool,
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MVPP2_RX_BUF_SIZE(new_pool->pkt_size));
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spin_unlock_irqrestore(&new_pool->lock, flags);
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return new_pool;
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}
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/* Initialize pools for swf */
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static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)
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{
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unsigned long flags = 0;
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int rxq;
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if (!port->pool_long) {
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@ -3714,9 +3724,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)
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if (!port->pool_long)
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return -ENOMEM;
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spin_lock_irqsave(&port->pool_long->lock, flags);
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port->pool_long->port_map |= (1 << port->id);
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spin_unlock_irqrestore(&port->pool_long->lock, flags);
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for (rxq = 0; rxq < rxq_number; rxq++)
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mvpp2_rxq_long_pool_set(port, rxq, port->pool_long->id);
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@ -3730,9 +3738,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)
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if (!port->pool_short)
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return -ENOMEM;
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spin_lock_irqsave(&port->pool_short->lock, flags);
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port->pool_short->port_map |= (1 << port->id);
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spin_unlock_irqrestore(&port->pool_short->lock, flags);
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for (rxq = 0; rxq < rxq_number; rxq++)
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mvpp2_rxq_short_pool_set(port, rxq,
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@ -3806,7 +3812,6 @@ static void mvpp2_interrupts_unmask(void *arg)
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mvpp2_write(port->priv, MVPP2_ISR_RX_TX_MASK_REG(port->id),
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(MVPP2_CAUSE_MISC_SUM_MASK |
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MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK |
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MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK));
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}
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@ -4382,23 +4387,6 @@ static void mvpp2_rx_time_coal_set(struct mvpp2_port *port,
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rxq->time_coal = usec;
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}
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/* Set threshold for TX_DONE pkts coalescing */
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static void mvpp2_tx_done_pkts_coal_set(void *arg)
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{
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struct mvpp2_port *port = arg;
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int queue;
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u32 val;
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for (queue = 0; queue < txq_number; queue++) {
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struct mvpp2_tx_queue *txq = port->txqs[queue];
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val = (txq->done_pkts_coal << MVPP2_TRANSMITTED_THRESH_OFFSET) &
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MVPP2_TRANSMITTED_THRESH_MASK;
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mvpp2_write(port->priv, MVPP2_TXQ_NUM_REG, txq->id);
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mvpp2_write(port->priv, MVPP2_TXQ_THRESH_REG, val);
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}
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}
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/* Free Tx queue skbuffs */
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static void mvpp2_txq_bufs_free(struct mvpp2_port *port,
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struct mvpp2_tx_queue *txq,
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@ -4407,8 +4395,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port,
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int i;
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for (i = 0; i < num; i++) {
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struct mvpp2_tx_desc *tx_desc = txq->descs +
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txq_pcpu->txq_get_index;
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dma_addr_t buf_phys_addr =
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txq_pcpu->tx_buffs[txq_pcpu->txq_get_index];
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struct sk_buff *skb = txq_pcpu->tx_skb[txq_pcpu->txq_get_index];
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mvpp2_txq_inc_get(txq_pcpu);
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@ -4416,8 +4404,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port,
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if (!skb)
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continue;
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dma_unmap_single(port->dev->dev.parent, tx_desc->buf_phys_addr,
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tx_desc->data_size, DMA_TO_DEVICE);
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dma_unmap_single(port->dev->dev.parent, buf_phys_addr,
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skb_headlen(skb), DMA_TO_DEVICE);
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dev_kfree_skb_any(skb);
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}
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}
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@ -4433,7 +4421,7 @@ static inline struct mvpp2_rx_queue *mvpp2_get_rx_queue(struct mvpp2_port *port,
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static inline struct mvpp2_tx_queue *mvpp2_get_tx_queue(struct mvpp2_port *port,
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u32 cause)
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{
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int queue = fls(cause >> 16) - 1;
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int queue = fls(cause) - 1;
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return port->txqs[queue];
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}
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@ -4460,6 +4448,29 @@ static void mvpp2_txq_done(struct mvpp2_port *port, struct mvpp2_tx_queue *txq,
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netif_tx_wake_queue(nq);
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}
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static unsigned int mvpp2_tx_done(struct mvpp2_port *port, u32 cause)
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{
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struct mvpp2_tx_queue *txq;
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struct mvpp2_txq_pcpu *txq_pcpu;
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unsigned int tx_todo = 0;
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while (cause) {
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txq = mvpp2_get_tx_queue(port, cause);
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if (!txq)
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break;
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txq_pcpu = this_cpu_ptr(txq->pcpu);
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if (txq_pcpu->count) {
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mvpp2_txq_done(port, txq, txq_pcpu);
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tx_todo += txq_pcpu->count;
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}
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cause &= ~(1 << txq->log_id);
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}
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return tx_todo;
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}
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/* Rx/Tx queue initialization/cleanup methods */
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/* Allocate and initialize descriptors for aggr TXQ */
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@ -4649,12 +4660,13 @@ static int mvpp2_txq_init(struct mvpp2_port *port,
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txq_pcpu->tx_skb = kmalloc(txq_pcpu->size *
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sizeof(*txq_pcpu->tx_skb),
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GFP_KERNEL);
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if (!txq_pcpu->tx_skb) {
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dma_free_coherent(port->dev->dev.parent,
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txq->size * MVPP2_DESC_ALIGNED_SIZE,
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txq->descs, txq->descs_phys);
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return -ENOMEM;
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}
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if (!txq_pcpu->tx_skb)
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goto error;
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txq_pcpu->tx_buffs = kmalloc(txq_pcpu->size *
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sizeof(dma_addr_t), GFP_KERNEL);
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if (!txq_pcpu->tx_buffs)
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goto error;
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txq_pcpu->count = 0;
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txq_pcpu->reserved_num = 0;
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@ -4663,6 +4675,19 @@ static int mvpp2_txq_init(struct mvpp2_port *port,
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}
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return 0;
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error:
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for_each_present_cpu(cpu) {
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txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);
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kfree(txq_pcpu->tx_skb);
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kfree(txq_pcpu->tx_buffs);
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}
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dma_free_coherent(port->dev->dev.parent,
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txq->size * MVPP2_DESC_ALIGNED_SIZE,
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txq->descs, txq->descs_phys);
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return -ENOMEM;
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}
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/* Free allocated TXQ resources */
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@ -4675,6 +4700,7 @@ static void mvpp2_txq_deinit(struct mvpp2_port *port,
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for_each_present_cpu(cpu) {
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txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);
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kfree(txq_pcpu->tx_skb);
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kfree(txq_pcpu->tx_buffs);
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}
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if (txq->descs)
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@ -4805,7 +4831,6 @@ static int mvpp2_setup_txqs(struct mvpp2_port *port)
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goto err_cleanup;
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}
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on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1);
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on_each_cpu(mvpp2_txq_sent_counter_clear, port, 1);
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return 0;
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@ -4887,6 +4912,49 @@ static void mvpp2_link_event(struct net_device *dev)
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}
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}
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static void mvpp2_timer_set(struct mvpp2_port_pcpu *port_pcpu)
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{
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ktime_t interval;
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if (!port_pcpu->timer_scheduled) {
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port_pcpu->timer_scheduled = true;
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interval = ktime_set(0, MVPP2_TXDONE_HRTIMER_PERIOD_NS);
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hrtimer_start(&port_pcpu->tx_done_timer, interval,
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HRTIMER_MODE_REL_PINNED);
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}
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}
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static void mvpp2_tx_proc_cb(unsigned long data)
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{
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struct net_device *dev = (struct net_device *)data;
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struct mvpp2_port *port = netdev_priv(dev);
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struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu);
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unsigned int tx_todo, cause;
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|
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if (!netif_running(dev))
|
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return;
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port_pcpu->timer_scheduled = false;
|
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|
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/* Process all the Tx queues */
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cause = (1 << txq_number) - 1;
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tx_todo = mvpp2_tx_done(port, cause);
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|
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/* Set the timer in case not all the packets were processed */
|
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if (tx_todo)
|
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mvpp2_timer_set(port_pcpu);
|
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}
|
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|
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static enum hrtimer_restart mvpp2_hr_timer_cb(struct hrtimer *timer)
|
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{
|
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struct mvpp2_port_pcpu *port_pcpu = container_of(timer,
|
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struct mvpp2_port_pcpu,
|
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tx_done_timer);
|
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|
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tasklet_schedule(&port_pcpu->tx_done_tasklet);
|
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|
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return HRTIMER_NORESTART;
|
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}
|
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|
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/* Main RX/TX processing routines */
|
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|
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/* Display more error info */
|
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@ -5144,11 +5212,11 @@ static int mvpp2_tx_frag_process(struct mvpp2_port *port, struct sk_buff *skb,
|
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if (i == (skb_shinfo(skb)->nr_frags - 1)) {
|
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/* Last descriptor */
|
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tx_desc->command = MVPP2_TXD_L_DESC;
|
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mvpp2_txq_inc_put(txq_pcpu, skb);
|
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mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc);
|
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} else {
|
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/* Descriptor in the middle: Not First, Not Last */
|
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tx_desc->command = 0;
|
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mvpp2_txq_inc_put(txq_pcpu, NULL);
|
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mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc);
|
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}
|
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}
|
||||
|
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@ -5214,12 +5282,12 @@ static int mvpp2_tx(struct sk_buff *skb, struct net_device *dev)
|
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/* First and Last descriptor */
|
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tx_cmd |= MVPP2_TXD_F_DESC | MVPP2_TXD_L_DESC;
|
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tx_desc->command = tx_cmd;
|
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mvpp2_txq_inc_put(txq_pcpu, skb);
|
||||
mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc);
|
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} else {
|
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/* First but not Last */
|
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tx_cmd |= MVPP2_TXD_F_DESC | MVPP2_TXD_PADDING_DISABLE;
|
||||
tx_desc->command = tx_cmd;
|
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mvpp2_txq_inc_put(txq_pcpu, NULL);
|
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mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc);
|
||||
|
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/* Continue with other skb fragments */
|
||||
if (mvpp2_tx_frag_process(port, skb, aggr_txq, txq)) {
|
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@ -5255,6 +5323,17 @@ out:
|
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dev_kfree_skb_any(skb);
|
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}
|
||||
|
||||
/* Finalize TX processing */
|
||||
if (txq_pcpu->count >= txq->done_pkts_coal)
|
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mvpp2_txq_done(port, txq, txq_pcpu);
|
||||
|
||||
/* Set the timer in case not all frags were processed */
|
||||
if (txq_pcpu->count <= frags && txq_pcpu->count > 0) {
|
||||
struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu);
|
||||
|
||||
mvpp2_timer_set(port_pcpu);
|
||||
}
|
||||
|
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return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
@ -5268,10 +5347,11 @@ static inline void mvpp2_cause_error(struct net_device *dev, int cause)
|
||||
netdev_err(dev, "tx fifo underrun error\n");
|
||||
}
|
||||
|
||||
static void mvpp2_txq_done_percpu(void *arg)
|
||||
static int mvpp2_poll(struct napi_struct *napi, int budget)
|
||||
{
|
||||
struct mvpp2_port *port = arg;
|
||||
u32 cause_rx_tx, cause_tx, cause_misc;
|
||||
u32 cause_rx_tx, cause_rx, cause_misc;
|
||||
int rx_done = 0;
|
||||
struct mvpp2_port *port = netdev_priv(napi->dev);
|
||||
|
||||
/* Rx/Tx cause register
|
||||
*
|
||||
@ -5285,7 +5365,7 @@ static void mvpp2_txq_done_percpu(void *arg)
|
||||
*/
|
||||
cause_rx_tx = mvpp2_read(port->priv,
|
||||
MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
|
||||
cause_tx = cause_rx_tx & MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
|
||||
cause_rx_tx &= ~MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
|
||||
cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK;
|
||||
|
||||
if (cause_misc) {
|
||||
@ -5297,26 +5377,6 @@ static void mvpp2_txq_done_percpu(void *arg)
|
||||
cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK);
|
||||
}
|
||||
|
||||
/* Release TX descriptors */
|
||||
if (cause_tx) {
|
||||
struct mvpp2_tx_queue *txq = mvpp2_get_tx_queue(port, cause_tx);
|
||||
struct mvpp2_txq_pcpu *txq_pcpu = this_cpu_ptr(txq->pcpu);
|
||||
|
||||
if (txq_pcpu->count)
|
||||
mvpp2_txq_done(port, txq, txq_pcpu);
|
||||
}
|
||||
}
|
||||
|
||||
static int mvpp2_poll(struct napi_struct *napi, int budget)
|
||||
{
|
||||
u32 cause_rx_tx, cause_rx;
|
||||
int rx_done = 0;
|
||||
struct mvpp2_port *port = netdev_priv(napi->dev);
|
||||
|
||||
on_each_cpu(mvpp2_txq_done_percpu, port, 1);
|
||||
|
||||
cause_rx_tx = mvpp2_read(port->priv,
|
||||
MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
|
||||
cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;
|
||||
|
||||
/* Process RX packets */
|
||||
@ -5561,6 +5621,8 @@ err_cleanup_rxqs:
|
||||
static int mvpp2_stop(struct net_device *dev)
|
||||
{
|
||||
struct mvpp2_port *port = netdev_priv(dev);
|
||||
struct mvpp2_port_pcpu *port_pcpu;
|
||||
int cpu;
|
||||
|
||||
mvpp2_stop_dev(port);
|
||||
mvpp2_phy_disconnect(port);
|
||||
@ -5569,6 +5631,13 @@ static int mvpp2_stop(struct net_device *dev)
|
||||
on_each_cpu(mvpp2_interrupts_mask, port, 1);
|
||||
|
||||
free_irq(port->irq, port);
|
||||
for_each_present_cpu(cpu) {
|
||||
port_pcpu = per_cpu_ptr(port->pcpu, cpu);
|
||||
|
||||
hrtimer_cancel(&port_pcpu->tx_done_timer);
|
||||
port_pcpu->timer_scheduled = false;
|
||||
tasklet_kill(&port_pcpu->tx_done_tasklet);
|
||||
}
|
||||
mvpp2_cleanup_rxqs(port);
|
||||
mvpp2_cleanup_txqs(port);
|
||||
|
||||
@ -5784,7 +5853,6 @@ static int mvpp2_ethtool_set_coalesce(struct net_device *dev,
|
||||
txq->done_pkts_coal = c->tx_max_coalesced_frames;
|
||||
}
|
||||
|
||||
on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -6035,6 +6103,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
|
||||
{
|
||||
struct device_node *phy_node;
|
||||
struct mvpp2_port *port;
|
||||
struct mvpp2_port_pcpu *port_pcpu;
|
||||
struct net_device *dev;
|
||||
struct resource *res;
|
||||
const char *dt_mac_addr;
|
||||
@ -6044,7 +6113,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
|
||||
int features;
|
||||
int phy_mode;
|
||||
int priv_common_regs_num = 2;
|
||||
int err, i;
|
||||
int err, i, cpu;
|
||||
|
||||
dev = alloc_etherdev_mqs(sizeof(struct mvpp2_port), txq_number,
|
||||
rxq_number);
|
||||
@ -6135,6 +6204,24 @@ static int mvpp2_port_probe(struct platform_device *pdev,
|
||||
}
|
||||
mvpp2_port_power_up(port);
|
||||
|
||||
port->pcpu = alloc_percpu(struct mvpp2_port_pcpu);
|
||||
if (!port->pcpu) {
|
||||
err = -ENOMEM;
|
||||
goto err_free_txq_pcpu;
|
||||
}
|
||||
|
||||
for_each_present_cpu(cpu) {
|
||||
port_pcpu = per_cpu_ptr(port->pcpu, cpu);
|
||||
|
||||
hrtimer_init(&port_pcpu->tx_done_timer, CLOCK_MONOTONIC,
|
||||
HRTIMER_MODE_REL_PINNED);
|
||||
port_pcpu->tx_done_timer.function = mvpp2_hr_timer_cb;
|
||||
port_pcpu->timer_scheduled = false;
|
||||
|
||||
tasklet_init(&port_pcpu->tx_done_tasklet, mvpp2_tx_proc_cb,
|
||||
(unsigned long)dev);
|
||||
}
|
||||
|
||||
netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT);
|
||||
features = NETIF_F_SG | NETIF_F_IP_CSUM;
|
||||
dev->features = features | NETIF_F_RXCSUM;
|
||||
@ -6144,7 +6231,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
|
||||
err = register_netdev(dev);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "failed to register netdev\n");
|
||||
goto err_free_txq_pcpu;
|
||||
goto err_free_port_pcpu;
|
||||
}
|
||||
netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr);
|
||||
|
||||
@ -6153,6 +6240,8 @@ static int mvpp2_port_probe(struct platform_device *pdev,
|
||||
priv->port_list[id] = port;
|
||||
return 0;
|
||||
|
||||
err_free_port_pcpu:
|
||||
free_percpu(port->pcpu);
|
||||
err_free_txq_pcpu:
|
||||
for (i = 0; i < txq_number; i++)
|
||||
free_percpu(port->txqs[i]->pcpu);
|
||||
@ -6171,6 +6260,7 @@ static void mvpp2_port_remove(struct mvpp2_port *port)
|
||||
int i;
|
||||
|
||||
unregister_netdev(port->dev);
|
||||
free_percpu(port->pcpu);
|
||||
free_percpu(port->stats);
|
||||
for (i = 0; i < txq_number; i++)
|
||||
free_percpu(port->txqs[i]->pcpu);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user