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Update devfreq next for v5.13

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Detailed description for this pull request:
 1. Update devfreq core
 - Register devfreq as a cooling device when adding devfreq device
 basically if the flag of devfreq device is set as cooling device.
 
 - Add missing unlock opeation in devfreq_add_device
 
 - Use the next frequency as resume_freq instead of previous frequency
   when using opp-suspend property
 
 - Check whether .get_dev_status in struct devfreq_dev_profile is
 implemented or not by devfreq driver before calling .get_dev_status
 function.
 
 2. Update devfreq driver
 - Use dev_err_probe to simplify the error handling on rk3399_dmc.c
 
 - Remove unused .get_dev_status function on imx8m-ddrc.c because
 imx8m_ddrc_get_dev_status has not returend the any current status of
 device.
 
 - Remove unneeded of_match_ptr() from imx-bus.c and imx8m-ddrc.ca
 
 - Add missing phandle informatioon and replace undefined variable
 with integer value for rk3399_dmc.txt devicetree binding document.
 
 3. Update minor issue
 - Fix the wrong set_freq path of userspace governor in drivers/devfreq/Kconfig
 - Remove the invalid description from .get_target_freq in struct
 devfreq_dev_profile
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Merge tag 'devfreq-next-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux

Pull devfreq updates for v5.13 from Chanwoo Choi:

"1. Update devfreq core

 - Register devfreq as a cooling device when adding devfreq device,
   basically if the flag of devfreq device is set as cooling device.

 - Add missing unlock opeation in devfreq_add_device

 - Use the next frequency as resume_freq instead of previous frequency
   when using opp-suspend property

 - Check whether .get_dev_status in struct devfreq_dev_profile is
   implemented or not by devfreq driver before calling .get_dev_status
   function.

 2. Update devfreq drivers

 - Use dev_err_probe to simplify the error handling on rk3399_dmc.c

 - Remove unused .get_dev_status function on imx8m-ddrc.c because
   imx8m_ddrc_get_dev_status has not returend the any current status
   of the device.

 - Remove unneeded of_match_ptr() from imx-bus.c and imx8m-ddrc.ca

 - Add missing phandle informatioon and replace undefined variable
   with integer value for rk3399_dmc.txt devicetree binding document.

 3. Fix minor issues

 - Fix the wrong set_freq path of userspace governor in
   drivers/devfreq/Kconfig.

 - Remove the invalid description from .get_target_freq in struct
   devfreq_dev_profile."

* tag 'devfreq-next-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux:
  PM / devfreq: imx8m-ddrc: Remove unneeded of_match_ptr()
  PM / devfreq: imx-bus: Remove unneeded of_match_ptr()
  PM / devfreq: imx8m-ddrc: Remove imx8m_ddrc_get_dev_status
  PM / devfreq: Remove the invalid description for get_target_freq
  PM / devfreq: Check get_dev_status in devfreq_update_stats
  PM / devfreq: Fix the wrong set_freq path for userspace governor in Kconfig
  dt-bindings: devfreq: rk3399_dmc: Remove references of unexistant defines
  dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle.
  PM / devfreq: rk3399_dmc: Simplify with dev_err_probe()
  PM / devfreq: Use more accurate returned new_freq as resume_freq
  PM / devfreq: Unlock mutex and free devfreq struct in error path
  PM / devfreq: Register devfreq as a cooling device on demand
This commit is contained in:
Rafael J. Wysocki 2021-04-08 19:30:46 +02:00
commit e9ff02264d
9 changed files with 70 additions and 78 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/ABI/testing/sysfs-class-devfreq
View File

@ -97,10 +97,7 @@ Description:
object. The values are represented in ms. If the value is object. The values are represented in ms. If the value is
less than 1 jiffy, it is considered to be 0, which means less than 1 jiffy, it is considered to be 0, which means
no polling. This value is meaningless if the governor is no polling. This value is meaningless if the governor is
not polling; thus. If the governor is not using not polling.
devfreq-provided central polling
(/sys/class/devfreq/.../central_polling is 0), this value
may be useless.
A list of governors that support the node: A list of governors that support the node:
- simple_ondmenad - simple_ondmenad

75
Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
View File

@ -12,6 +12,8 @@ Required properties:
for details. for details.
- center-supply: DMC supply node. - center-supply: DMC supply node.
- status: Marks the node enabled/disabled. - status: Marks the node enabled/disabled.
- rockchip,pmu: Phandle to the syscon managing the "PMU general register
files".
Optional properties: Optional properties:
- interrupts: The CPU interrupt number. The interrupt specifier - interrupts: The CPU interrupt number. The interrupt specifier
@ -77,24 +79,23 @@ Following properties relate to DDR timing:
- rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
the DRAM side driver strength in ohms. Default the DRAM side driver strength in ohms. Default
value is DDR3_DS_40ohm. value is 40.
- rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
the DRAM side ODT strength in ohms. Default value the DRAM side ODT strength in ohms. Default value
is DDR3_ODT_120ohm. is 120.
- rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
the phy side CA line (incluing command line, the phy side CA line (incluing command line,
address line and clock line) driver strength. address line and clock line) driver strength.
Default value is PHY_DRV_ODT_40. Default value is 40.
- rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
the PHY side DQ line (including DQS/DQ/DM line) the PHY side DQ line (including DQS/DQ/DM line)
driver strength. Default value is PHY_DRV_ODT_40. driver strength. Default value is 40.
- rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines - rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines
the PHY side ODT strength. Default value is the PHY side ODT strength. Default value is 240.
PHY_DRV_ODT_240.
- rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines - rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines
then ODT disable frequency in MHz (Mega Hz). then ODT disable frequency in MHz (Mega Hz).
@ -104,25 +105,23 @@ Following properties relate to DDR timing:
- rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines - rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines
the DRAM side driver strength in ohms. Default the DRAM side driver strength in ohms. Default
value is LP3_DS_34ohm. value is 34.
- rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines - rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines
the DRAM side ODT strength in ohms. Default value the DRAM side ODT strength in ohms. Default value
is LP3_ODT_240ohm. is 240.
- rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines - rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines
the PHY side CA line (including command line, the PHY side CA line (including command line,
address line and clock line) driver strength. address line and clock line) driver strength.
Default value is PHY_DRV_ODT_40. Default value is 40.
- rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines - rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines
the PHY side DQ line (including DQS/DQ/DM line) the PHY side DQ line (including DQS/DQ/DM line)
driver strength. Default value is driver strength. Default value is 40.
PHY_DRV_ODT_40.
- rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define - rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define
the phy side odt strength, default value is the phy side odt strength, default value is 240.
PHY_DRV_ODT_240.
- rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter - rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter
defines the ODT disable frequency in defines the ODT disable frequency in
@ -132,32 +131,30 @@ Following properties relate to DDR timing:
- rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines - rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines
the DRAM side driver strength in ohms. Default the DRAM side driver strength in ohms. Default
value is LP4_PDDS_60ohm. value is 60.
- rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines - rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines
the DRAM side ODT on DQS/DQ line strength in ohms. the DRAM side ODT on DQS/DQ line strength in ohms.
Default value is LP4_DQ_ODT_40ohm. Default value is 40.
- rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines - rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines
the DRAM side ODT on CA line strength in ohms. the DRAM side ODT on CA line strength in ohms.
Default value is LP4_CA_ODT_40ohm. Default value is 40.
- rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines - rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines
the PHY side CA line (including command address the PHY side CA line (including command address
line) driver strength. Default value is line) driver strength. Default value is 40.
PHY_DRV_ODT_40.
- rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines - rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines
the PHY side clock line and CS line driver the PHY side clock line and CS line driver
strength. Default value is PHY_DRV_ODT_80. strength. Default value is 80.
- rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines - rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines
the PHY side DQ line (including DQS/DQ/DM line) the PHY side DQ line (including DQS/DQ/DM line)
driver strength. Default value is PHY_DRV_ODT_80. driver strength. Default value is 80.
- rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines - rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines
the PHY side ODT strength. Default value is the PHY side ODT strength. Default value is 60.
PHY_DRV_ODT_60.
Example: Example:
dmc_opp_table: dmc_opp_table { dmc_opp_table: dmc_opp_table {
@ -193,23 +190,23 @@ Example:
rockchip,phy_dll_dis_freq = <125>; rockchip,phy_dll_dis_freq = <125>;
rockchip,auto_pd_dis_freq = <666>; rockchip,auto_pd_dis_freq = <666>;
rockchip,ddr3_odt_dis_freq = <333>; rockchip,ddr3_odt_dis_freq = <333>;
rockchip,ddr3_drv = <DDR3_DS_40ohm>; rockchip,ddr3_drv = <40>;
rockchip,ddr3_odt = <DDR3_ODT_120ohm>; rockchip,ddr3_odt = <120>;
rockchip,phy_ddr3_ca_drv = <PHY_DRV_ODT_40>; rockchip,phy_ddr3_ca_drv = <40>;
rockchip,phy_ddr3_dq_drv = <PHY_DRV_ODT_40>; rockchip,phy_ddr3_dq_drv = <40>;
rockchip,phy_ddr3_odt = <PHY_DRV_ODT_240>; rockchip,phy_ddr3_odt = <240>;
rockchip,lpddr3_odt_dis_freq = <333>; rockchip,lpddr3_odt_dis_freq = <333>;
rockchip,lpddr3_drv = <LP3_DS_34ohm>; rockchip,lpddr3_drv = <34>;
rockchip,lpddr3_odt = <LP3_ODT_240ohm>; rockchip,lpddr3_odt = <240>;
rockchip,phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>; rockchip,phy_lpddr3_ca_drv = <40>;
rockchip,phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>; rockchip,phy_lpddr3_dq_drv = <40>;
rockchip,phy_lpddr3_odt = <PHY_DRV_ODT_240>; rockchip,phy_lpddr3_odt = <240>;
rockchip,lpddr4_odt_dis_freq = <333>; rockchip,lpddr4_odt_dis_freq = <333>;
rockchip,lpddr4_drv = <LP4_PDDS_60ohm>; rockchip,lpddr4_drv = <60>;
rockchip,lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>; rockchip,lpddr4_dq_odt = <40>;
rockchip,lpddr4_ca_odt = <LP4_CA_ODT_40ohm>; rockchip,lpddr4_ca_odt = <40>;
rockchip,phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>; rockchip,phy_lpddr4_ca_drv = <40>;
rockchip,phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>; rockchip,phy_lpddr4_ck_cs_drv = <80>;
rockchip,phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>; rockchip,phy_lpddr4_dq_drv = <80>;
rockchip,phy_lpddr4_odt = <PHY_DRV_ODT_60>; rockchip,phy_lpddr4_odt = <60>;
}; };

2
drivers/devfreq/Kconfig
View File

@ -62,7 +62,7 @@ config DEVFREQ_GOV_USERSPACE
help help
Sets the frequency at the user specified one. Sets the frequency at the user specified one.
This governor returns the user configured frequency if there This governor returns the user configured frequency if there
has been an input to /sys/devices/.../power/devfreq_set_freq. has been an input to /sys/devices/.../userspace/set_freq.
Otherwise, the governor does not change the frequency Otherwise, the governor does not change the frequency
given at the initialization. given at the initialization.

14
drivers/devfreq/devfreq.c
View File

@ -11,6 +11,7 @@
#include <linux/kmod.h> #include <linux/kmod.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/debugfs.h> #include <linux/debugfs.h>
#include <linux/devfreq_cooling.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/init.h> #include <linux/init.h>
@ -387,7 +388,7 @@ static int devfreq_set_target(struct devfreq *devfreq, unsigned long new_freq,
devfreq->previous_freq = new_freq; devfreq->previous_freq = new_freq;
if (devfreq->suspend_freq) if (devfreq->suspend_freq)
devfreq->resume_freq = cur_freq; devfreq->resume_freq = new_freq;
return err; return err;
} }
@ -821,7 +822,8 @@ struct devfreq *devfreq_add_device(struct device *dev,
if (devfreq->profile->timer < 0 if (devfreq->profile->timer < 0
|| devfreq->profile->timer >= DEVFREQ_TIMER_NUM) { || devfreq->profile->timer >= DEVFREQ_TIMER_NUM) {
goto err_out; mutex_unlock(&devfreq->lock);
goto err_dev;
} }
if (!devfreq->profile->max_state && !devfreq->profile->freq_table) { if (!devfreq->profile->max_state && !devfreq->profile->freq_table) {
@ -935,6 +937,12 @@ struct devfreq *devfreq_add_device(struct device *dev,
mutex_unlock(&devfreq_list_lock); mutex_unlock(&devfreq_list_lock);
if (devfreq->profile->is_cooling_device) {
devfreq->cdev = devfreq_cooling_em_register(devfreq, NULL);
if (IS_ERR(devfreq->cdev))
devfreq->cdev = NULL;
}
return devfreq; return devfreq;
err_init: err_init:
@ -960,6 +968,8 @@ int devfreq_remove_device(struct devfreq *devfreq)
if (!devfreq) if (!devfreq)
return -EINVAL; return -EINVAL;
devfreq_cooling_unregister(devfreq->cdev);
if (devfreq->governor) { if (devfreq->governor) {
devfreq->governor->event_handler(devfreq, devfreq->governor->event_handler(devfreq,
DEVFREQ_GOV_STOP, NULL); DEVFREQ_GOV_STOP, NULL);

5
drivers/devfreq/governor.h
View File

@ -57,8 +57,6 @@
* Basically, get_target_freq will run * Basically, get_target_freq will run
* devfreq_dev_profile.get_dev_status() to get the * devfreq_dev_profile.get_dev_status() to get the
* status of the device (load = busy_time / total_time). * status of the device (load = busy_time / total_time).
* If no_central_polling is set, this callback is called
* only with update_devfreq() notified by OPP.
* @event_handler: Callback for devfreq core framework to notify events * @event_handler: Callback for devfreq core framework to notify events
* to governors. Events include per device governor * to governors. Events include per device governor
* init and exit, opp changes out of devfreq, suspend * init and exit, opp changes out of devfreq, suspend
@ -91,6 +89,9 @@ int devfreq_update_target(struct devfreq *devfreq, unsigned long freq);
static inline int devfreq_update_stats(struct devfreq *df) static inline int devfreq_update_stats(struct devfreq *df)
{ {
if (!df->profile->get_dev_status)
return -EINVAL;
return df->profile->get_dev_status(df->dev.parent, &df->last_status); return df->profile->get_dev_status(df->dev.parent, &df->last_status);
} }
#endif /* _GOVERNOR_H */ #endif /* _GOVERNOR_H */

2
drivers/devfreq/imx-bus.c
View File

@ -169,7 +169,7 @@ static struct platform_driver imx_bus_platdrv = {
.probe = imx_bus_probe, .probe = imx_bus_probe,
.driver = { .driver = {
.name = "imx-bus-devfreq", .name = "imx-bus-devfreq",
.of_match_table = of_match_ptr(imx_bus_of_match), .of_match_table = imx_bus_of_match,
}, },
}; };
module_platform_driver(imx_bus_platdrv); module_platform_driver(imx_bus_platdrv);

16
drivers/devfreq/imx8m-ddrc.c
View File

@ -280,18 +280,6 @@ static int imx8m_ddrc_get_cur_freq(struct device *dev, unsigned long *freq)
return 0; return 0;
} }
static int imx8m_ddrc_get_dev_status(struct device *dev,
struct devfreq_dev_status *stat)
{
struct imx8m_ddrc *priv = dev_get_drvdata(dev);
stat->busy_time = 0;
stat->total_time = 0;
stat->current_frequency = clk_get_rate(priv->dram_core);
return 0;
}
static int imx8m_ddrc_init_freq_info(struct device *dev) static int imx8m_ddrc_init_freq_info(struct device *dev)
{ {
struct imx8m_ddrc *priv = dev_get_drvdata(dev); struct imx8m_ddrc *priv = dev_get_drvdata(dev);
@ -429,9 +417,7 @@ static int imx8m_ddrc_probe(struct platform_device *pdev)
if (ret < 0) if (ret < 0)
goto err; goto err;
priv->profile.polling_ms = 1000;
priv->profile.target = imx8m_ddrc_target; priv->profile.target = imx8m_ddrc_target;
priv->profile.get_dev_status = imx8m_ddrc_get_dev_status;
priv->profile.exit = imx8m_ddrc_exit; priv->profile.exit = imx8m_ddrc_exit;
priv->profile.get_cur_freq = imx8m_ddrc_get_cur_freq; priv->profile.get_cur_freq = imx8m_ddrc_get_cur_freq;
priv->profile.initial_freq = clk_get_rate(priv->dram_core); priv->profile.initial_freq = clk_get_rate(priv->dram_core);
@ -461,7 +447,7 @@ static struct platform_driver imx8m_ddrc_platdrv = {
.probe = imx8m_ddrc_probe, .probe = imx8m_ddrc_probe,
.driver = { .driver = {
.name = "imx8m-ddrc-devfreq", .name = "imx8m-ddrc-devfreq",
.of_match_table = of_match_ptr(imx8m_ddrc_of_match), .of_match_table = imx8m_ddrc_of_match,
}, },
}; };
module_platform_driver(imx8m_ddrc_platdrv); module_platform_driver(imx8m_ddrc_platdrv);

20
drivers/devfreq/rk3399_dmc.c
View File

@ -324,22 +324,14 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
mutex_init(&data->lock); mutex_init(&data->lock);
data->vdd_center = devm_regulator_get(dev, "center"); data->vdd_center = devm_regulator_get(dev, "center");
if (IS_ERR(data->vdd_center)) { if (IS_ERR(data->vdd_center))
if (PTR_ERR(data->vdd_center) == -EPROBE_DEFER) return dev_err_probe(dev, PTR_ERR(data->vdd_center),
return -EPROBE_DEFER; "Cannot get the regulator \"center\"\n");
dev_err(dev, "Cannot get the regulator \"center\"\n");
return PTR_ERR(data->vdd_center);
}
data->dmc_clk = devm_clk_get(dev, "dmc_clk"); data->dmc_clk = devm_clk_get(dev, "dmc_clk");
if (IS_ERR(data->dmc_clk)) { if (IS_ERR(data->dmc_clk))
if (PTR_ERR(data->dmc_clk) == -EPROBE_DEFER) return dev_err_probe(dev, PTR_ERR(data->dmc_clk),
return -EPROBE_DEFER; "Cannot get the clk dmc_clk\n");
dev_err(dev, "Cannot get the clk dmc_clk\n");
return PTR_ERR(data->dmc_clk);
}
data->edev = devfreq_event_get_edev_by_phandle(dev, "devfreq-events", 0); data->edev = devfreq_event_get_edev_by_phandle(dev, "devfreq-events", 0);
if (IS_ERR(data->edev)) if (IS_ERR(data->edev))

9
include/linux/devfreq.h
View File

@ -38,6 +38,7 @@ enum devfreq_timer {
struct devfreq; struct devfreq;
struct devfreq_governor; struct devfreq_governor;
struct thermal_cooling_device;
/** /**
* struct devfreq_dev_status - Data given from devfreq user device to * struct devfreq_dev_status - Data given from devfreq user device to
@ -98,11 +99,15 @@ struct devfreq_dev_status {
* @freq_table: Optional list of frequencies to support statistics * @freq_table: Optional list of frequencies to support statistics
* and freq_table must be generated in ascending order. * and freq_table must be generated in ascending order.
* @max_state: The size of freq_table. * @max_state: The size of freq_table.
*
* @is_cooling_device: A self-explanatory boolean giving the device a
* cooling effect property.
*/ */
struct devfreq_dev_profile { struct devfreq_dev_profile {
unsigned long initial_freq; unsigned long initial_freq;
unsigned int polling_ms; unsigned int polling_ms;
enum devfreq_timer timer; enum devfreq_timer timer;
bool is_cooling_device;
int (*target)(struct device *dev, unsigned long *freq, u32 flags); int (*target)(struct device *dev, unsigned long *freq, u32 flags);
int (*get_dev_status)(struct device *dev, int (*get_dev_status)(struct device *dev,
@ -156,6 +161,7 @@ struct devfreq_stats {
* @suspend_count: suspend requests counter for a device. * @suspend_count: suspend requests counter for a device.
* @stats: Statistics of devfreq device behavior * @stats: Statistics of devfreq device behavior
* @transition_notifier_list: list head of DEVFREQ_TRANSITION_NOTIFIER notifier * @transition_notifier_list: list head of DEVFREQ_TRANSITION_NOTIFIER notifier
* @cdev: Cooling device pointer if the devfreq has cooling property
* @nb_min: Notifier block for DEV_PM_QOS_MIN_FREQUENCY * @nb_min: Notifier block for DEV_PM_QOS_MIN_FREQUENCY
* @nb_max: Notifier block for DEV_PM_QOS_MAX_FREQUENCY * @nb_max: Notifier block for DEV_PM_QOS_MAX_FREQUENCY
* *
@ -198,6 +204,9 @@ struct devfreq {
struct srcu_notifier_head transition_notifier_list; struct srcu_notifier_head transition_notifier_list;
/* Pointer to the cooling device if used for thermal mitigation */
struct thermal_cooling_device *cdev;
struct notifier_block nb_min; struct notifier_block nb_min;
struct notifier_block nb_max; struct notifier_block nb_max;
}; };