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watchdog: Add Mstar MSC313e WDT driver
It adds a driver for the IP block handling the watchdog timer found for Mstar MSC313e SoCs and newer. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Co-developed-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Romain Perier <romain.perier@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20210611200801.52139-3-romain.perier@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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@ -2175,6 +2175,7 @@ F: arch/arm/boot/dts/mstar-*
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F: arch/arm/mach-mstar/
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F: drivers/clk/mstar/
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F: drivers/gpio/gpio-msc313.c
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F: drivers/watchdog/msc313e_wdt.c
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F: include/dt-bindings/clock/mstar-*
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F: include/dt-bindings/gpio/msc313-gpio.h
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@ -989,6 +989,18 @@ config VISCONTI_WATCHDOG
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Say Y here to include support for the watchdog timer in Toshiba
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Visconti SoCs.
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config MSC313E_WATCHDOG
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tristate "MStar MSC313e watchdog"
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depends on ARCH_MSTARV7 || COMPILE_TEST
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select WATCHDOG_CORE
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help
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Say Y here to include support for the Watchdog timer embedded
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into MStar MSC313e chips. This will reboot your system when the
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timeout is reached.
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To compile this driver as a module, choose M here: the
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module will be called msc313e_wdt.
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# X86 (i386 + ia64 + x86_64) Architecture
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config ACQUIRE_WDT
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@ -93,6 +93,7 @@ obj-$(CONFIG_SPRD_WATCHDOG) += sprd_wdt.o
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obj-$(CONFIG_PM8916_WATCHDOG) += pm8916_wdt.o
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obj-$(CONFIG_ARM_SMC_WATCHDOG) += arm_smc_wdt.o
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obj-$(CONFIG_VISCONTI_WATCHDOG) += visconti_wdt.o
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obj-$(CONFIG_MSC313E_WATCHDOG) += msc313e_wdt.o
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# X86 (i386 + ia64 + x86_64) Architecture
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obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
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166
drivers/watchdog/msc313e_wdt.c
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166
drivers/watchdog/msc313e_wdt.c
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@ -0,0 +1,166 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* MStar WDT driver
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*
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* Copyright (C) 2019 - 2021 Daniel Palmer
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* Copyright (C) 2021 Romain Perier
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*
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#define REG_WDT_CLR 0x0
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#define REG_WDT_MAX_PRD_L 0x10
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#define REG_WDT_MAX_PRD_H 0x14
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#define MSC313E_WDT_MIN_TIMEOUT 1
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#define MSC313E_WDT_DEFAULT_TIMEOUT 30
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static unsigned int timeout;
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
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struct msc313e_wdt_priv {
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void __iomem *base;
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struct watchdog_device wdev;
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struct clk *clk;
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};
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static int msc313e_wdt_start(struct watchdog_device *wdev)
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{
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struct msc313e_wdt_priv *priv = watchdog_get_drvdata(wdev);
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u32 timeout;
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int err;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return err;
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timeout = wdev->timeout * clk_get_rate(priv->clk);
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writew(timeout & 0xffff, priv->base + REG_WDT_MAX_PRD_L);
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writew((timeout >> 16) & 0xffff, priv->base + REG_WDT_MAX_PRD_H);
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writew(1, priv->base + REG_WDT_CLR);
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return 0;
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}
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static int msc313e_wdt_ping(struct watchdog_device *wdev)
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{
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struct msc313e_wdt_priv *priv = watchdog_get_drvdata(wdev);
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writew(1, priv->base + REG_WDT_CLR);
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return 0;
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}
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static int msc313e_wdt_stop(struct watchdog_device *wdev)
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{
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struct msc313e_wdt_priv *priv = watchdog_get_drvdata(wdev);
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writew(0, priv->base + REG_WDT_MAX_PRD_L);
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writew(0, priv->base + REG_WDT_MAX_PRD_H);
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writew(0, priv->base + REG_WDT_CLR);
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clk_disable_unprepare(priv->clk);
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return 0;
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}
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static int msc313e_wdt_settimeout(struct watchdog_device *wdev, unsigned int new_time)
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{
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wdev->timeout = new_time;
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return msc313e_wdt_start(wdev);
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}
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static const struct watchdog_info msc313e_wdt_ident = {
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.identity = "MSC313e watchdog",
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.options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
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};
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static const struct watchdog_ops msc313e_wdt_ops = {
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.owner = THIS_MODULE,
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.start = msc313e_wdt_start,
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.stop = msc313e_wdt_stop,
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.ping = msc313e_wdt_ping,
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.set_timeout = msc313e_wdt_settimeout,
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};
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static const struct of_device_id msc313e_wdt_of_match[] = {
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{ .compatible = "mstar,msc313e-wdt", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, msc313e_wdt_of_match);
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static int msc313e_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct msc313e_wdt_priv *priv;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(priv->clk)) {
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dev_err(dev, "No input clock\n");
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return PTR_ERR(priv->clk);
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}
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priv->wdev.info = &msc313e_wdt_ident,
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priv->wdev.ops = &msc313e_wdt_ops,
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priv->wdev.parent = dev;
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priv->wdev.min_timeout = MSC313E_WDT_MIN_TIMEOUT;
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priv->wdev.max_timeout = U32_MAX / clk_get_rate(priv->clk);
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priv->wdev.timeout = MSC313E_WDT_DEFAULT_TIMEOUT;
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watchdog_set_drvdata(&priv->wdev, priv);
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watchdog_init_timeout(&priv->wdev, timeout, dev);
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watchdog_stop_on_reboot(&priv->wdev);
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watchdog_stop_on_unregister(&priv->wdev);
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return devm_watchdog_register_device(dev, &priv->wdev);
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}
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static int __maybe_unused msc313e_wdt_suspend(struct device *dev)
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{
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struct msc313e_wdt_priv *priv = dev_get_drvdata(dev);
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if (watchdog_active(&priv->wdev))
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msc313e_wdt_stop(&priv->wdev);
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return 0;
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}
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static int __maybe_unused msc313e_wdt_resume(struct device *dev)
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{
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struct msc313e_wdt_priv *priv = dev_get_drvdata(dev);
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if (watchdog_active(&priv->wdev))
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msc313e_wdt_start(&priv->wdev);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(msc313e_wdt_pm_ops, msc313e_wdt_suspend, msc313e_wdt_resume);
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static struct platform_driver msc313e_wdt_driver = {
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.driver = {
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.name = "msc313e-wdt",
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.of_match_table = msc313e_wdt_of_match,
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.pm = &msc313e_wdt_pm_ops,
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},
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.probe = msc313e_wdt_probe,
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};
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module_platform_driver(msc313e_wdt_driver);
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MODULE_AUTHOR("Daniel Palmer <daniel@thingy.jp>");
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MODULE_DESCRIPTION("Watchdog driver for MStar MSC313e");
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MODULE_LICENSE("GPL v2");
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