[PATCH] S2io: Hardware fixes for Xframe II adapter

Hi,

Patch Description:
This patch incorporates the following hardware fixes required
for Xframe II adapter.
1. New values to program the dtx_control register.
2. Disable memory controller interrupts(MC_INTR) since these
   are now monitored thru' a poll routine.
3. Don't reset an XframeII card on an ECC double-bit error(It
   can recover).
4. Save/restore PCI config space before/after a reset irrespective
   of Xframe I or II card.
5. Bumped up the driver version no. to 2.0.3.1

Please review the patch and apply the same if it looks ok.

Signed-off-by: Ravinandan Arakali <ravinandan.arakali@neterion.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
ravinandan.arakali@neterion.com 2005-08-12 10:15:59 -07:00 committed by Jeff Garzik
parent 3d52365c4f
commit e960fc5c7d

View File

@ -67,7 +67,7 @@
/* S2io Driver name & version. */ /* S2io Driver name & version. */
static char s2io_driver_name[] = "Neterion"; static char s2io_driver_name[] = "Neterion";
static char s2io_driver_version[] = "Version 2.0.2.1"; static char s2io_driver_version[] = "Version 2.0.3.1";
static inline int RXD_IS_UP2DT(RxD_t *rxdp) static inline int RXD_IS_UP2DT(RxD_t *rxdp)
{ {
@ -210,14 +210,18 @@ static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned long vid)
static u64 herc_act_dtx_cfg[] = { static u64 herc_act_dtx_cfg[] = {
/* Set address */ /* Set address */
0x80000515BA750000ULL, 0x80000515BA7500E0ULL, 0x8000051536750000ULL, 0x80000515367500E0ULL,
/* Write data */ /* Write data */
0x80000515BA750004ULL, 0x80000515BA7500E4ULL, 0x8000051536750004ULL, 0x80000515367500E4ULL,
/* Set address */ /* Set address */
0x80010515003F0000ULL, 0x80010515003F00E0ULL, 0x80010515003F0000ULL, 0x80010515003F00E0ULL,
/* Write data */ /* Write data */
0x80010515003F0004ULL, 0x80010515003F00E4ULL, 0x80010515003F0004ULL, 0x80010515003F00E4ULL,
/* Set address */ /* Set address */
0x801205150D440000ULL, 0x801205150D4400E0ULL,
/* Write data */
0x801205150D440004ULL, 0x801205150D4400E4ULL,
/* Set address */
0x80020515F2100000ULL, 0x80020515F21000E0ULL, 0x80020515F2100000ULL, 0x80020515F21000E0ULL,
/* Write data */ /* Write data */
0x80020515F2100004ULL, 0x80020515F21000E4ULL, 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
@ -1903,7 +1907,7 @@ static int start_nic(struct s2io_nic *nic)
} }
/* Enable select interrupts */ /* Enable select interrupts */
interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR | MC_INTR; interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
interruptible |= TX_PIC_INTR | RX_PIC_INTR; interruptible |= TX_PIC_INTR | RX_PIC_INTR;
interruptible |= TX_MAC_INTR | RX_MAC_INTR; interruptible |= TX_MAC_INTR | RX_MAC_INTR;
@ -2030,7 +2034,7 @@ static void stop_nic(struct s2io_nic *nic)
config = &nic->config; config = &nic->config;
/* Disable all interrupts */ /* Disable all interrupts */
interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR | MC_INTR; interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
interruptible |= TX_PIC_INTR | RX_PIC_INTR; interruptible |= TX_PIC_INTR | RX_PIC_INTR;
interruptible |= TX_MAC_INTR | RX_MAC_INTR; interruptible |= TX_MAC_INTR | RX_MAC_INTR;
en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS); en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);
@ -2688,8 +2692,10 @@ static void alarm_intr_handler(struct s2io_nic *nic)
DBG_PRINT(ERR_DBG, "%s: Device indicates ", DBG_PRINT(ERR_DBG, "%s: Device indicates ",
dev->name); dev->name);
DBG_PRINT(ERR_DBG, "double ECC error!!\n"); DBG_PRINT(ERR_DBG, "double ECC error!!\n");
if (nic->device_type != XFRAME_II_DEVICE) {
netif_stop_queue(dev); netif_stop_queue(dev);
schedule_work(&nic->rst_timer_task); schedule_work(&nic->rst_timer_task);
}
} else { } else {
nic->mac_control.stats_info->sw_stat. nic->mac_control.stats_info->sw_stat.
single_ecc_errs++; single_ecc_errs++;
@ -2772,7 +2778,6 @@ void s2io_reset(nic_t * sp)
u16 subid, pci_cmd; u16 subid, pci_cmd;
/* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */ /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
if (sp->device_type == XFRAME_I_DEVICE)
pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd)); pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
val64 = SW_RESET_ALL; val64 = SW_RESET_ALL;
@ -2792,14 +2797,10 @@ void s2io_reset(nic_t * sp)
*/ */
msleep(250); msleep(250);
if (!(sp->device_type & XFRAME_II_DEVICE)) { /* Restore the PCI state saved during initialization. */
/* Restore the PCI state saved during initializarion. */
pci_restore_state(sp->pdev); pci_restore_state(sp->pdev);
pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
pci_cmd); pci_cmd);
} else {
pci_set_master(sp->pdev);
}
s2io_init_pci(sp); s2io_init_pci(sp);
msleep(250); msleep(250);
@ -5426,9 +5427,7 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
INIT_WORK(&sp->set_link_task, INIT_WORK(&sp->set_link_task,
(void (*)(void *)) s2io_set_link, sp); (void (*)(void *)) s2io_set_link, sp);
if (!(sp->device_type & XFRAME_II_DEVICE)) {
pci_save_state(sp->pdev); pci_save_state(sp->pdev);
}
/* Setting swapper control on the NIC, for proper reset operation */ /* Setting swapper control on the NIC, for proper reset operation */
if (s2io_set_swapper(sp)) { if (s2io_set_swapper(sp)) {