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ALSA: firewire-motu: fix register handling for 828
After further investigation, I find out some mistakes for 828 about its
register. This commit fixes it.
Fixes: d13d6b284d
("ALSA: firewire-motu: add support for MOTU 828")
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Link: https://lore.kernel.org/r/20210623075941.72562-9-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
parent
7203233ea7
commit
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@ -19,7 +19,7 @@
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// 0x00004000: mode of optical output interface.
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// 0x00004000: for S/PDIF signal.
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// 0x00000000: disabled or for ADAT signal.
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// 0x00003f40: monitor input mode.
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// 0x00003f00: monitor input mode.
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// 0x00000800: analog-1/2
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// 0x00001a00: analog-3/4
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// 0x00002c00: analog-5/6
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@ -32,26 +32,32 @@
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// 0x00002d00: analog-6
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// 0x00003600: analog-7
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// 0x00003f00: analog-8
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// 0x00000040: disabled
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// 0x00000080: enable stream input.
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// 0x00000040: disable monitor input.
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// 0x00000008: enable main out.
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// 0x00000004: rate of sampling clock.
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// 0x00000004: 48.0 kHz
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// 0x00000000: 44.1 kHz
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// 0x00000023: source of sampling clock.
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// 0x00000003: source packet header (SPH)
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// 0x00000002: S/PDIF on optical/coaxial interface.
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// 0x00000021: ADAT on optical interface
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// 0x00000001: ADAT on Dsub 9pin
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// 0x00000000: internal or SMPTE
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// 0x00000000: internal
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#define CLK_828_STATUS_OFFSET 0x0b00
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#define CLK_828_STATUS_MASK 0x0000ffff
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#define CLK_828_STATUS_FLAG_OPT_IN_IFACE_IS_SPDIF 0x00008000
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#define CLK_828_STATUS_FLAG_OPT_OUT_IFACE_IS_SPDIF 0x00004000
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#define CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES 0x00000080
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#define CLK_828_STATUS_FLAG_SRC_IS_NOT_FROM_ADAT_DSUB 0x00000020
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#define CLK_828_STATUS_FLAG_OUTPUT_MUTE 0x00000008
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#define CLK_828_STATUS_FLAG_ENABLE_OUTPUT 0x00000008
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#define CLK_828_STATUS_FLAG_RATE_48000 0x00000004
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#define CLK_828_STATUS_FLAG_SRC_SPDIF_ON_OPT_OR_COAX 0x00000002
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#define CLK_828_STATUS_FLAG_SRC_ADAT_ON_OPT_OR_DSUB 0x00000001
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#define CLK_828_STATUS_MASK_SRC 0x00000023
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#define CLK_828_STATUS_FLAG_SRC_ADAT_ON_OPT 0x00000021
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#define CLK_828_STATUS_FLAG_SRC_SPH 0x00000003
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#define CLK_828_STATUS_FLAG_SRC_SPDIF 0x00000002
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#define CLK_828_STATUS_FLAG_SRC_ADAT_ON_DSUB 0x00000001
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#define CLK_828_STATUS_FLAG_SRC_INTERNAL 0x00000000
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// Status register for MOTU 896 (0x'ffff'f000'0b14).
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//
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@ -249,18 +255,29 @@ static int get_clock_source_828(struct snd_motu *motu, enum snd_motu_clock_sourc
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return err;
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data = be32_to_cpu(reg) & CLK_828_STATUS_MASK;
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if (data & CLK_828_STATUS_FLAG_SRC_ADAT_ON_OPT_OR_DSUB) {
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if (data & CLK_828_STATUS_FLAG_SRC_IS_NOT_FROM_ADAT_DSUB)
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switch (data & CLK_828_STATUS_MASK_SRC) {
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case CLK_828_STATUS_FLAG_SRC_ADAT_ON_OPT:
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*src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT;
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else
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*src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB;
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} else if (data & CLK_828_STATUS_FLAG_SRC_SPDIF_ON_OPT_OR_COAX) {
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break;
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case CLK_828_STATUS_FLAG_SRC_SPH:
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*src = SND_MOTU_CLOCK_SOURCE_SPH;
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break;
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case CLK_828_STATUS_FLAG_SRC_SPDIF:
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{
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if (data & CLK_828_STATUS_FLAG_OPT_IN_IFACE_IS_SPDIF)
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*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT;
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else
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*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX;
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} else {
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else
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*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT;
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break;
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}
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case CLK_828_STATUS_FLAG_SRC_ADAT_ON_DSUB:
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*src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB;
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break;
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case CLK_828_STATUS_FLAG_SRC_INTERNAL:
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*src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
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break;
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default:
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return -ENXIO;
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}
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return 0;
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@ -321,13 +338,13 @@ static int switch_fetching_mode_828(struct snd_motu *motu, bool enable)
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return err;
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data = be32_to_cpu(reg) & CLK_828_STATUS_MASK;
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data &= ~(CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES | CLK_828_STATUS_FLAG_OUTPUT_MUTE);
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data &= ~(CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES | CLK_828_STATUS_FLAG_ENABLE_OUTPUT);
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if (enable) {
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// This transaction should be initiated after the device receives batch of packets
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// since the device voluntarily mutes outputs. As a workaround, yield processor over
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// 100 msec.
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msleep(100);
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data |= CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES | CLK_828_STATUS_FLAG_OUTPUT_MUTE;
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data |= CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES | CLK_828_STATUS_FLAG_ENABLE_OUTPUT;
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}
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reg = cpu_to_be32(data);
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