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synced 2024-11-25 05:04:09 +08:00
Replace all DMA_nBIT_MASK macro with DMA_BIT_MASK(n)
This is the second go through of the old DMA_nBIT_MASK macro,and there're not so many of them left,so I put them into one patch.I hope this is the last round. After this the definition of the old DMA_nBIT_MASK macro could be removed. Signed-off-by: Yang Hongyang <yanghy@cn.fujitsu.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Greg KH <greg@kroah.com> Cc: Takashi Iwai <tiwai@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
316cb4ef3e
commit
e930438c42
@ -131,14 +131,14 @@ static struct musb_hdrc_platform_data musb_plat = {
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.power = 50, /* up to 100 mA */
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};
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static u64 musb_dmamask = DMA_32BIT_MASK;
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static u64 musb_dmamask = DMA_BIT_MASK(32);
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static struct platform_device musb_device = {
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.name = "musb_hdrc",
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.id = -1,
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.dev = {
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.dma_mask = &musb_dmamask,
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.coherent_dma_mask = DMA_32BIT_MASK,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &musb_plat,
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},
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.num_resources = ARRAY_SIZE(musb_resources),
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@ -146,14 +146,14 @@ static struct platform_device musb_device = {
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};
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#ifdef CONFIG_NOP_USB_XCEIV
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static u64 nop_xceiv_dmamask = DMA_32BIT_MASK;
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static u64 nop_xceiv_dmamask = DMA_BIT_MASK(32);
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static struct platform_device nop_xceiv_device = {
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.name = "nop_usb_xceiv",
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.id = -1,
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.dev = {
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.dma_mask = &nop_xceiv_dmamask,
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.coherent_dma_mask = DMA_32BIT_MASK,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = NULL,
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},
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};
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@ -16,7 +16,7 @@ EXPORT_SYMBOL(swiotlb);
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static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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{
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if (dev->coherent_dma_mask != DMA_64BIT_MASK)
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if (dev->coherent_dma_mask != DMA_BIT_MASK(64))
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gfp |= GFP_DMA;
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return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
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}
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@ -1059,7 +1059,7 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
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goto out;
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}
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err = pci_set_dma_mask(dev, DMA_32BIT_MASK);
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err = pci_set_dma_mask(dev, DMA_BIT_MASK(32));
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if (err) {
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dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
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goto out;
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@ -3505,7 +3505,7 @@ static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, u
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/* The Inbound Post Queue only accepts 32-bit physical addresses for the
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CCISS commands, so they must be allocated from the lower 4GiB of
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memory. */
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err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (err) {
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iounmap(vaddr);
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return -ENOMEM;
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@ -2532,8 +2532,8 @@ static int __devinit atl1c_probe(struct pci_dev *pdev,
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* various kernel subsystems to support the mechanics required by a
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* fixed-high-32-bit system.
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*/
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if ((pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) ||
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(pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) != 0)) {
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if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
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(pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
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dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
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goto err_dma;
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}
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@ -1821,11 +1821,11 @@ static int __devinit be_probe(struct pci_dev *pdev,
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be_msix_enable(adapter);
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status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
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status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
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if (!status) {
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netdev->features |= NETIF_F_HIGHDMA;
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} else {
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status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (status) {
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dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
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goto free_netdev;
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@ -2591,13 +2591,13 @@ static int
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jme_pci_dma64(struct pci_dev *pdev)
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{
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if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
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!pci_set_dma_mask(pdev, DMA_64BIT_MASK))
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if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
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!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
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if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
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return 1;
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if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
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!pci_set_dma_mask(pdev, DMA_40BIT_MASK))
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if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
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!pci_set_dma_mask(pdev, DMA_BIT_MASK(40)))
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if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
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return 1;
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if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
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@ -93,14 +93,14 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (pci_enable_device(pdev))
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return -EIO;
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ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret) {
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printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
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goto bad;
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}
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ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret) {
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printk(KERN_ERR "ath9k: 32-bit DMA consistent "
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@ -492,8 +492,8 @@ static int __devinit p54p_probe(struct pci_dev *pdev,
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goto err_disable_dev;
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}
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if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
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pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) ||
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pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
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dev_err(&pdev->dev, "No suitable DMA available\n");
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goto err_free_reg;
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}
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@ -2234,10 +2234,10 @@ static int twa_resume(struct pci_dev *pdev)
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pci_set_master(pdev);
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pci_try_set_mwi(pdev);
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if (pci_set_dma_mask(pdev, DMA_64BIT_MASK)
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|| pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
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if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)
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|| pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
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|| pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
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|| pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
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TW_PRINTK(host, TW_DRIVER, 0x40, "Failed to set dma mask during resume");
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retval = -ENODEV;
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goto out_disable_device;
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@ -1378,7 +1378,7 @@ int aac_get_adapter_info(struct aac_dev* dev)
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if (dev->nondasd_support && !dev->in_reset)
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printk(KERN_INFO "%s%d: Non-DASD support enabled.\n",dev->name, dev->id);
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if (dma_get_required_mask(&dev->pdev->dev) > DMA_32BIT_MASK)
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if (dma_get_required_mask(&dev->pdev->dev) > DMA_BIT_MASK(32))
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dev->needs_dac = 1;
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dev->dac_support = 0;
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if ((sizeof(dma_addr_t) > 4) && dev->needs_dac &&
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@ -855,9 +855,9 @@ _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
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if (sizeof(dma_addr_t) > 4) {
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const uint64_t required_mask =
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dma_get_required_mask(&pdev->dev);
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if ((required_mask > DMA_32BIT_MASK) && !pci_set_dma_mask(pdev,
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DMA_64BIT_MASK) && !pci_set_consistent_dma_mask(pdev,
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DMA_64BIT_MASK)) {
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if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
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DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
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DMA_BIT_MASK(64))) {
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ioc->base_add_sg_single = &_base_add_sg_single_64;
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ioc->sge_size = sizeof(Mpi2SGESimple64_t);
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desc = "64";
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@ -865,8 +865,8 @@ _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
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}
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}
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if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)
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&& !pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
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if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
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&& !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
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ioc->base_add_sg_single = &_base_add_sg_single_32;
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ioc->sge_size = sizeof(Mpi2SGESimple32_t);
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desc = "32";
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@ -1000,7 +1000,7 @@ static int __devinit b3dfg_probe(struct pci_dev *pdev,
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pci_set_master(pdev);
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r = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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r = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (r) {
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dev_err(&pdev->dev, "no usable DMA configuration\n");
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goto err_free_res;
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@ -36,14 +36,14 @@ struct nop_usb_xceiv {
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struct device *dev;
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};
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static u64 nop_xceiv_dmamask = DMA_32BIT_MASK;
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static u64 nop_xceiv_dmamask = DMA_BIT_MASK(32);
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static struct platform_device nop_xceiv_device = {
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.name = "nop_usb_xceiv",
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.id = -1,
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.dev = {
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.dma_mask = &nop_xceiv_dmamask,
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.coherent_dma_mask = DMA_32BIT_MASK,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = NULL,
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},
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};
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@ -2260,11 +2260,11 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
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gcap &= ~0x01;
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/* allow 64bit DMA address if supported by H/W */
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if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_64BIT_MASK))
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pci_set_consistent_dma_mask(pci, DMA_64BIT_MASK);
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if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
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pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
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else {
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pci_set_dma_mask(pci, DMA_32BIT_MASK);
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pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK);
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pci_set_dma_mask(pci, DMA_BIT_MASK(32));
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pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
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}
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/* read number of streams from GCAP register instead of using
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