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Merge branch 'for-3.16-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata into for-3.17
The scheduled ahci platform patches depend on change in for-3.16-fixes. Pull it into for-3.17. Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
commit
e8f781836d
10
MAINTAINERS
10
MAINTAINERS
@ -7993,6 +7993,16 @@ F: drivers/ata/
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F: include/linux/ata.h
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F: include/linux/libata.h
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SERIAL ATA AHCI PLATFORM devices support
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M: Hans de Goede <hdegoede@redhat.com>
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M: Tejun Heo <tj@kernel.org>
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L: linux-ide@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
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S: Supported
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F: drivers/ata/ahci_platform.c
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F: drivers/ata/libahci_platform.c
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F: include/linux/ahci_platform.h
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SERVER ENGINES 10Gbps iSCSI - BladeEngine 2 DRIVER
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M: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
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L: linux-scsi@vger.kernel.org
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@ -456,6 +456,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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/* Promise */
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{ PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */
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{ PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */
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/* Asmedia */
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{ PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci }, /* ASM1060 */
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@ -371,7 +371,9 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
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int pmp, unsigned long deadline,
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int (*check_ready)(struct ata_link *link));
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unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
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int ahci_stop_engine(struct ata_port *ap);
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void ahci_start_fis_rx(struct ata_port *ap);
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void ahci_start_engine(struct ata_port *ap);
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int ahci_check_ready(struct ata_link *link);
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int ahci_kick_engine(struct ata_port *ap);
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@ -58,6 +58,8 @@ enum ahci_imx_type {
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struct imx_ahci_priv {
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struct platform_device *ahci_pdev;
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enum ahci_imx_type type;
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struct clk *sata_clk;
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struct clk *sata_ref_clk;
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struct clk *ahb_clk;
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struct regmap *gpr;
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bool no_device;
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@ -225,7 +227,7 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)
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return ret;
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}
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ret = ahci_platform_enable_clks(hpriv);
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ret = clk_prepare_enable(imxpriv->sata_ref_clk);
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if (ret < 0)
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goto disable_regulator;
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@ -287,7 +289,7 @@ static void imx_sata_disable(struct ahci_host_priv *hpriv)
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!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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}
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ahci_platform_disable_clks(hpriv);
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clk_disable_unprepare(imxpriv->sata_ref_clk);
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if (hpriv->target_pwr)
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regulator_disable(hpriv->target_pwr);
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@ -320,6 +322,9 @@ static void ahci_imx_error_handler(struct ata_port *ap)
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writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR);
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imx_sata_disable(hpriv);
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imxpriv->no_device = true;
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dev_info(ap->dev, "no device found, disabling link.\n");
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dev_info(ap->dev, "pass " MODULE_PARAM_PREFIX ".hotplug=1 to enable hotplug\n");
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}
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static int ahci_imx_softreset(struct ata_link *link, unsigned int *class,
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@ -540,6 +545,19 @@ static int imx_ahci_probe(struct platform_device *pdev)
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imxpriv->no_device = false;
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imxpriv->first_time = true;
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imxpriv->type = (enum ahci_imx_type)of_id->data;
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imxpriv->sata_clk = devm_clk_get(dev, "sata");
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if (IS_ERR(imxpriv->sata_clk)) {
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dev_err(dev, "can't get sata clock.\n");
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return PTR_ERR(imxpriv->sata_clk);
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}
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imxpriv->sata_ref_clk = devm_clk_get(dev, "sata_ref");
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if (IS_ERR(imxpriv->sata_ref_clk)) {
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dev_err(dev, "can't get sata_ref clock.\n");
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return PTR_ERR(imxpriv->sata_ref_clk);
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}
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imxpriv->ahb_clk = devm_clk_get(dev, "ahb");
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if (IS_ERR(imxpriv->ahb_clk)) {
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dev_err(dev, "can't get ahb clock.\n");
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@ -573,10 +591,14 @@ static int imx_ahci_probe(struct platform_device *pdev)
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hpriv->plat_data = imxpriv;
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ret = imx_sata_enable(hpriv);
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ret = clk_prepare_enable(imxpriv->sata_clk);
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if (ret)
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return ret;
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ret = imx_sata_enable(hpriv);
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if (ret)
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goto disable_clk;
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/*
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* Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL,
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* and IP vendor specific register IMX_TIMER1MS.
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@ -601,16 +623,24 @@ static int imx_ahci_probe(struct platform_device *pdev)
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ret = ahci_platform_init_host(pdev, hpriv, &ahci_imx_port_info,
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0, 0, 0);
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if (ret)
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imx_sata_disable(hpriv);
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goto disable_sata;
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return 0;
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disable_sata:
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imx_sata_disable(hpriv);
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disable_clk:
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clk_disable_unprepare(imxpriv->sata_clk);
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return ret;
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}
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static void ahci_imx_host_stop(struct ata_host *host)
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{
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struct ahci_host_priv *hpriv = host->private_data;
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struct imx_ahci_priv *imxpriv = hpriv->plat_data;
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imx_sata_disable(hpriv);
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clk_disable_unprepare(imxpriv->sata_clk);
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}
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#ifdef CONFIG_PM_SLEEP
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@ -58,7 +58,7 @@ static int ahci_probe(struct platform_device *pdev)
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}
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if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci"))
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hflags |= AHCI_HFLAG_NO_FBS;
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hflags |= AHCI_HFLAG_NO_FBS | AHCI_HFLAG_NO_NCQ;
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rc = ahci_platform_init_host(pdev, hpriv, &ahci_port_info,
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hflags, 0, 0);
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@ -81,6 +81,7 @@
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struct xgene_ahci_context {
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struct ahci_host_priv *hpriv;
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struct device *dev;
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u8 last_cmd[MAX_AHCI_CHN_PERCTR]; /* tracking the last command issued*/
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void __iomem *csr_core; /* Core CSR address of IP */
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void __iomem *csr_diag; /* Diag CSR address of IP */
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void __iomem *csr_axi; /* AXI CSR address of IP */
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@ -100,6 +101,50 @@ static int xgene_ahci_init_memram(struct xgene_ahci_context *ctx)
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return 0;
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}
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/**
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* xgene_ahci_restart_engine - Restart the dma engine.
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* @ap : ATA port of interest
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*
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* Restarts the dma engine inside the controller.
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*/
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static int xgene_ahci_restart_engine(struct ata_port *ap)
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{
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struct ahci_host_priv *hpriv = ap->host->private_data;
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ahci_stop_engine(ap);
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ahci_start_fis_rx(ap);
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hpriv->start_engine(ap);
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return 0;
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}
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/**
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* xgene_ahci_qc_issue - Issue commands to the device
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* @qc: Command to issue
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*
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* Due to Hardware errata for IDENTIFY DEVICE command, the controller cannot
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* clear the BSY bit after receiving the PIO setup FIS. This results in the dma
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* state machine goes into the CMFatalErrorUpdate state and locks up. By
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* restarting the dma engine, it removes the controller out of lock up state.
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*/
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static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct ahci_host_priv *hpriv = ap->host->private_data;
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struct xgene_ahci_context *ctx = hpriv->plat_data;
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int rc = 0;
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if (unlikely(ctx->last_cmd[ap->port_no] == ATA_CMD_ID_ATA))
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xgene_ahci_restart_engine(ap);
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rc = ahci_qc_issue(qc);
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/* Save the last command issued */
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ctx->last_cmd[ap->port_no] = qc->tf.command;
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return rc;
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}
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/**
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* xgene_ahci_read_id - Read ID data from the specified device
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* @dev: device
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@ -107,14 +152,12 @@ static int xgene_ahci_init_memram(struct xgene_ahci_context *ctx)
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* @id: data buffer
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*
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* This custom read ID function is required due to the fact that the HW
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* does not support DEVSLP and the controller state machine may get stuck
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* after processing the ID query command.
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* does not support DEVSLP.
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*/
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static unsigned int xgene_ahci_read_id(struct ata_device *dev,
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struct ata_taskfile *tf, u16 *id)
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{
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u32 err_mask;
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void __iomem *port_mmio = ahci_port_base(dev->link->ap);
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err_mask = ata_do_dev_read_id(dev, tf, id);
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if (err_mask)
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@ -136,16 +179,6 @@ static unsigned int xgene_ahci_read_id(struct ata_device *dev,
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*/
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id[ATA_ID_FEATURE_SUPP] &= ~(1 << 8);
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/*
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* Due to HW errata, restart the port if no other command active.
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* Otherwise the controller may get stuck.
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*/
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if (!readl(port_mmio + PORT_CMD_ISSUE)) {
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writel(PORT_CMD_FIS_RX, port_mmio + PORT_CMD);
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readl(port_mmio + PORT_CMD); /* Force a barrier */
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writel(PORT_CMD_FIS_RX | PORT_CMD_START, port_mmio + PORT_CMD);
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readl(port_mmio + PORT_CMD); /* Force a barrier */
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}
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return 0;
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}
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@ -307,6 +340,7 @@ static struct ata_port_operations xgene_ahci_ops = {
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.host_stop = xgene_ahci_host_stop,
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.hardreset = xgene_ahci_hardreset,
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.read_id = xgene_ahci_read_id,
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.qc_issue = xgene_ahci_qc_issue,
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};
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static const struct ata_port_info xgene_ahci_port_info = {
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@ -68,7 +68,6 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
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static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
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static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
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static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
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static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
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static int ahci_port_start(struct ata_port *ap);
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static void ahci_port_stop(struct ata_port *ap);
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@ -620,7 +619,7 @@ int ahci_stop_engine(struct ata_port *ap)
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}
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EXPORT_SYMBOL_GPL(ahci_stop_engine);
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static void ahci_start_fis_rx(struct ata_port *ap)
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void ahci_start_fis_rx(struct ata_port *ap)
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{
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void __iomem *port_mmio = ahci_port_base(ap);
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struct ahci_host_priv *hpriv = ap->host->private_data;
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@ -646,6 +645,7 @@ static void ahci_start_fis_rx(struct ata_port *ap)
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/* flush */
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readl(port_mmio + PORT_CMD);
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}
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EXPORT_SYMBOL_GPL(ahci_start_fis_rx);
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static int ahci_stop_fis_rx(struct ata_port *ap)
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{
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@ -1945,7 +1945,7 @@ irqreturn_t ahci_interrupt(int irq, void *dev_instance)
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}
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EXPORT_SYMBOL_GPL(ahci_interrupt);
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static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
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unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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void __iomem *port_mmio = ahci_port_base(ap);
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@ -1974,6 +1974,7 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
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return 0;
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}
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EXPORT_SYMBOL_GPL(ahci_qc_issue);
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static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)
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{
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@ -250,8 +250,13 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
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if (IS_ERR(hpriv->phy)) {
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rc = PTR_ERR(hpriv->phy);
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switch (rc) {
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case -ENODEV:
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case -ENOSYS:
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/* No PHY support. Check if PHY is required. */
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if (of_find_property(dev->of_node, "phys", NULL)) {
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dev_err(dev, "couldn't get sata-phy: ENOSYS\n");
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goto err_out;
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}
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case -ENODEV:
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/* continue normally */
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hpriv->phy = NULL;
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break;
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@ -4787,6 +4787,10 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
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* ata_qc_new - Request an available ATA command, for queueing
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* @ap: target port
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*
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* Some ATA host controllers may implement a queue depth which is less
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* than ATA_MAX_QUEUE. So we shouldn't allocate a tag which is beyond
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* the hardware limitation.
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*
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* LOCKING:
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* None.
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*/
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@ -4794,14 +4798,15 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
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static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
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{
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struct ata_queued_cmd *qc = NULL;
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unsigned int max_queue = ap->host->n_tags;
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unsigned int i, tag;
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/* no command while frozen */
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if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
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return NULL;
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for (i = 0; i < ATA_MAX_QUEUE; i++) {
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tag = (i + ap->last_tag + 1) % ATA_MAX_QUEUE;
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for (i = 0, tag = ap->last_tag + 1; i < max_queue; i++, tag++) {
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tag = tag < max_queue ? tag : 0;
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/* the last tag is reserved for internal command. */
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if (tag == ATA_TAG_INTERNAL)
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@ -6088,6 +6093,7 @@ void ata_host_init(struct ata_host *host, struct device *dev,
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{
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spin_lock_init(&host->lock);
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mutex_init(&host->eh_mutex);
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host->n_tags = ATA_MAX_QUEUE - 1;
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host->dev = dev;
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host->ops = ops;
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}
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@ -6169,6 +6175,8 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
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{
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int i, rc;
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host->n_tags = clamp(sht->can_queue, 1, ATA_MAX_QUEUE - 1);
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/* host must have been started */
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if (!(host->flags & ATA_HOST_STARTED)) {
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dev_err(host->dev, "BUG: trying to register unstarted host\n");
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@ -1811,7 +1811,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
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case ATA_DEV_ATA:
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if (err & ATA_ICRC)
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qc->err_mask |= AC_ERR_ATA_BUS;
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if (err & ATA_UNC)
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if (err & (ATA_UNC | ATA_AMNF))
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qc->err_mask |= AC_ERR_MEDIA;
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if (err & ATA_IDNF)
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qc->err_mask |= AC_ERR_INVALID;
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@ -2556,11 +2556,12 @@ static void ata_eh_link_report(struct ata_link *link)
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}
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if (cmd->command != ATA_CMD_PACKET &&
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(res->feature & (ATA_ICRC | ATA_UNC | ATA_IDNF |
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ATA_ABORTED)))
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ata_dev_err(qc->dev, "error: { %s%s%s%s}\n",
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(res->feature & (ATA_ICRC | ATA_UNC | ATA_AMNF |
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ATA_IDNF | ATA_ABORTED)))
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ata_dev_err(qc->dev, "error: { %s%s%s%s%s}\n",
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res->feature & ATA_ICRC ? "ICRC " : "",
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res->feature & ATA_UNC ? "UNC " : "",
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res->feature & ATA_AMNF ? "AMNF " : "",
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res->feature & ATA_IDNF ? "IDNF " : "",
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res->feature & ATA_ABORTED ? "ABRT " : "");
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#endif
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|
@ -915,7 +915,7 @@ static int ep93xx_pata_probe(struct platform_device *pdev)
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struct ep93xx_pata_data *drv_data;
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struct ata_host *host;
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struct ata_port *ap;
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unsigned int irq;
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int irq;
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struct resource *mem_res;
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void __iomem *ide_base;
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int err;
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@ -593,6 +593,7 @@ struct ata_host {
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struct device *dev;
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void __iomem * const *iomap;
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unsigned int n_ports;
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unsigned int n_tags; /* nr of NCQ tags */
|
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void *private_data;
|
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struct ata_port_operations *ops;
|
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unsigned long flags;
|
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|
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