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cxgb4: clean up init_one
clean up init_one and use chip_ver consistently throughout init_one() for chip version. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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57ccaedb74
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@ -5240,14 +5240,11 @@ static void free_some_resources(struct adapter *adapter)
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NETIF_F_IPV6_CSUM | NETIF_F_HIGHDMA)
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#define SEGMENT_SIZE 128
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static int get_chip_type(struct pci_dev *pdev, u32 pl_rev)
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static int t4_get_chip_type(struct adapter *adap, int ver)
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{
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u16 device_id;
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u32 pl_rev = REV_G(t4_read_reg(adap, PL_REV_A));
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/* Retrieve adapter's device ID */
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pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id);
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switch (device_id >> 12) {
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switch (ver) {
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case CHELSIO_T4:
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return CHELSIO_CHIP_CODE(CHELSIO_T4, pl_rev);
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case CHELSIO_T5:
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@ -5255,8 +5252,7 @@ static int get_chip_type(struct pci_dev *pdev, u32 pl_rev)
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case CHELSIO_T6:
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return CHELSIO_CHIP_CODE(CHELSIO_T6, pl_rev);
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default:
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dev_err(&pdev->dev, "Device %d is not supported\n",
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device_id);
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break;
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}
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return -EINVAL;
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}
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@ -5426,15 +5422,18 @@ static int cxgb4_iov_configure(struct pci_dev *pdev, int num_vfs)
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static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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int func, i, err, s_qpp, qpp, num_seg;
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struct net_device *netdev;
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struct adapter *adapter;
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static int adap_idx = 1;
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int s_qpp, qpp, num_seg;
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struct port_info *pi;
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bool highdma = false;
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struct adapter *adapter = NULL;
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struct net_device *netdev;
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void __iomem *regs;
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u32 whoami, pl_rev;
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enum chip_type chip;
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static int adap_idx = 1;
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void __iomem *regs;
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int func, chip_ver;
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u16 device_id;
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int i, err;
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u32 whoami;
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printk_once(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION);
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@ -5470,11 +5469,17 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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goto out_free_adapter;
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/* We control everything through one PF */
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whoami = readl(regs + PL_WHOAMI_A);
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pl_rev = REV_G(readl(regs + PL_REV_A));
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chip = get_chip_type(pdev, pl_rev);
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func = CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5 ?
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SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
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whoami = t4_read_reg(adapter, PL_WHOAMI_A);
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pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id);
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chip = t4_get_chip_type(adapter, CHELSIO_PCI_ID_VER(device_id));
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if (chip < 0) {
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dev_err(&pdev->dev, "Device %d is not supported\n", device_id);
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err = chip;
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goto out_free_adapter;
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}
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chip_ver = CHELSIO_CHIP_VERSION(chip);
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func = chip_ver <= CHELSIO_T5 ?
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SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
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adapter->pdev = pdev;
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adapter->pdev_dev = &pdev->dev;
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@ -5640,7 +5645,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
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NETIF_F_HW_TC;
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if (CHELSIO_CHIP_VERSION(chip) > CHELSIO_T5) {
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if (chip_ver > CHELSIO_T5) {
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netdev->hw_enc_features |= NETIF_F_IP_CSUM |
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NETIF_F_IPV6_CSUM |
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NETIF_F_RXCSUM |
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@ -5720,7 +5725,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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dev_warn(&pdev->dev, "could not allocate MPS Encap entries, continuing\n");
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#if IS_ENABLED(CONFIG_IPV6)
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if ((CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) &&
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if (chip_ver <= CHELSIO_T5 &&
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(!(t4_read_reg(adapter, LE_DB_CONFIG_A) & ASLIPCOMPEN_F))) {
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/* CLIP functionality is not present in hardware,
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* hence disable all offload features
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@ -34,6 +34,8 @@
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#ifndef __T4_CHIP_TYPE_H__
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#define __T4_CHIP_TYPE_H__
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#define CHELSIO_PCI_ID_VER(__DeviceID) ((__DeviceID) >> 12)
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#define CHELSIO_T4 0x4
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#define CHELSIO_T5 0x5
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#define CHELSIO_T6 0x6
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