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perf record: Fix manpage formatting of description of support to hybrid systems

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The Intel hybrid description is written in a different style than the
rest of the perf record man page. There were some new command line
options added after it which resulted in very strange section ordering.
Move the hybrid include last.

Also the sub sections in the hybrid document don't fit the record
manpage well (especially since it talks about all kinds of unrelated
commands). I left this for now, but would be better to separate this
properly in the different man pages.

It would be better to use sub sections for the other sections, but these
don't seem to be supported in AsciiDoc?

Some of the examples are still misrendered in the manpage with an
indented troff command, but I don't know how to fix that.

In any case it's now better than before.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: zhengjun.xing@intel.com
Link: https://lore.kernel.org/r/20220818100127.249401-1-ak@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Andi Kleen 2022-08-18 03:01:27 -07:00 committed by Arnaldo Carvalho de Melo
parent 0c361c6eab
commit e89eaa611c
2 changed files with 2 additions and 12 deletions
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10
tools/perf/Documentation/intel-hybrid.txt
View File

@ -21,11 +21,6 @@ cat /sys/devices/cpu_atom/cpus
It indicates cpu0-cpu15 are core cpus and cpu16-cpu23 are atom cpus. It indicates cpu0-cpu15 are core cpus and cpu16-cpu23 are atom cpus.
Quickstart
List hybrid event
-----------------
As before, use perf-list to list the symbolic event. As before, use perf-list to list the symbolic event.
perf list perf list
@ -40,7 +35,6 @@ the event is belong to. Same event name but with different pmu can
be supported. be supported.
Enable hybrid event with a specific pmu Enable hybrid event with a specific pmu
---------------------------------------
To enable a core only event or atom only event, following syntax is supported: To enable a core only event or atom only event, following syntax is supported:
@ -53,7 +47,6 @@ For example, count the 'cycles' event on core cpus.
perf stat -e cpu_core/cycles/ perf stat -e cpu_core/cycles/
Create two events for one hardware event automatically Create two events for one hardware event automatically
------------------------------------------------------
When creating one event and the event is available on both atom and core, When creating one event and the event is available on both atom and core,
two events are created automatically. One is for atom, the other is for two events are created automatically. One is for atom, the other is for
@ -132,7 +125,6 @@ For perf-stat result, it displays two events:
The first 'cycles' is core event, the second 'cycles' is atom event. The first 'cycles' is core event, the second 'cycles' is atom event.
Thread mode example: Thread mode example:
--------------------
perf-stat reports the scaled counts for hybrid event and with a percentage perf-stat reports the scaled counts for hybrid event and with a percentage
displayed. The percentage is the event's running time/enabling time. displayed. The percentage is the event's running time/enabling time.
@ -176,14 +168,12 @@ perf_event_attr:
604,097,080 cpu_atom/cycles/ (99.57%) 604,097,080 cpu_atom/cycles/ (99.57%)
perf-record: perf-record:
------------
If there is no '-e' specified in perf record, on hybrid platform, If there is no '-e' specified in perf record, on hybrid platform,
it creates two default 'cycles' and adds them to event list. One it creates two default 'cycles' and adds them to event list. One
is for core, the other is for atom. is for core, the other is for atom.
perf-stat: perf-stat:
----------
If there is no '-e' specified in perf stat, on hybrid platform, If there is no '-e' specified in perf stat, on hybrid platform,
besides of software events, following events are created and besides of software events, following events are created and

4
tools/perf/Documentation/perf-record.txt
View File

@ -757,8 +757,6 @@ events in data directory files. Option specified with no or empty value
defaults to CPU layout. Masks defined or provided by the option value are defaults to CPU layout. Masks defined or provided by the option value are
filtered through the mask provided by -C option. filtered through the mask provided by -C option.
include::intel-hybrid.txt[]
--debuginfod[=URLs]:: --debuginfod[=URLs]::
Specify debuginfod URL to be used when cacheing perf.data binaries, Specify debuginfod URL to be used when cacheing perf.data binaries,
it follows the same syntax as the DEBUGINFOD_URLS variable, like: it follows the same syntax as the DEBUGINFOD_URLS variable, like:
@ -778,6 +776,8 @@ include::intel-hybrid.txt[]
only, as of now. So the applications built without the frame only, as of now. So the applications built without the frame
pointer might see bogus addresses. pointer might see bogus addresses.
include::intel-hybrid.txt[]
SEE ALSO SEE ALSO
-------- --------
linkperf:perf-stat[1], linkperf:perf-list[1], linkperf:perf-intel-pt[1] linkperf:perf-stat[1], linkperf:perf-list[1], linkperf:perf-intel-pt[1]