pinctrl: meson-gx: TEST_N belongs to the AO controller

On meson-gx platforms, TEST_N has been incorrectly declared in the EE
controller while it belongs to AO controller.

Move the pin to the appropriate controller

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Jerome Brunet 2017-09-20 15:39:26 +02:00 committed by Linus Walleij
parent 70e5ecb1b9
commit e891a5a401
4 changed files with 10 additions and 10 deletions

View File

@ -141,8 +141,6 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {
MESON_PIN(GPIOCLK_1), MESON_PIN(GPIOCLK_1),
MESON_PIN(GPIOCLK_2), MESON_PIN(GPIOCLK_2),
MESON_PIN(GPIOCLK_3), MESON_PIN(GPIOCLK_3),
MESON_PIN(GPIO_TEST_N),
}; };
static const unsigned int emmc_nand_d07_pins[] = { static const unsigned int emmc_nand_d07_pins[] = {
@ -258,6 +256,8 @@ static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = {
MESON_PIN(GPIOAO_11), MESON_PIN(GPIOAO_11),
MESON_PIN(GPIOAO_12), MESON_PIN(GPIOAO_12),
MESON_PIN(GPIOAO_13), MESON_PIN(GPIOAO_13),
MESON_PIN(GPIO_TEST_N),
}; };
static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
@ -596,8 +596,6 @@ static const char * const gpio_periphs_groups[] = {
"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
"GPIOX_20", "GPIOX_21", "GPIOX_22", "GPIOX_20", "GPIOX_21", "GPIOX_22",
"GPIO_TEST_N",
}; };
static const char * const emmc_groups[] = { static const char * const emmc_groups[] = {
@ -706,6 +704,8 @@ static const char * const gpio_aobus_groups[] = {
"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
"GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13", "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
"GPIO_TEST_N",
}; };
static const char * const uart_ao_groups[] = { static const char * const uart_ao_groups[] = {

View File

@ -122,8 +122,6 @@ static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = {
MESON_PIN(GPIOCLK_0), MESON_PIN(GPIOCLK_0),
MESON_PIN(GPIOCLK_1), MESON_PIN(GPIOCLK_1),
MESON_PIN(GPIO_TEST_N),
}; };
static const unsigned int emmc_nand_d07_pins[] = { static const unsigned int emmc_nand_d07_pins[] = {
@ -263,6 +261,8 @@ static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {
MESON_PIN(GPIOAO_7), MESON_PIN(GPIOAO_7),
MESON_PIN(GPIOAO_8), MESON_PIN(GPIOAO_8),
MESON_PIN(GPIOAO_9), MESON_PIN(GPIOAO_9),
MESON_PIN(GPIO_TEST_N),
}; };
static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
@ -587,8 +587,6 @@ static const char * const gpio_periphs_groups[] = {
"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18",
"GPIO_TEST_N",
}; };
static const char * const emmc_groups[] = { static const char * const emmc_groups[] = {
@ -703,6 +701,8 @@ static const char * const tsin_a_groups[] = {
static const char * const gpio_aobus_groups[] = { static const char * const gpio_aobus_groups[] = {
"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
"GPIO_TEST_N",
}; };
static const char * const uart_ao_groups[] = { static const char * const uart_ao_groups[] = {

View File

@ -29,6 +29,7 @@
#define GPIOAO_11 11 #define GPIOAO_11 11
#define GPIOAO_12 12 #define GPIOAO_12 12
#define GPIOAO_13 13 #define GPIOAO_13 13
#define GPIO_TEST_N 14
#define GPIOZ_0 0 #define GPIOZ_0 0
#define GPIOZ_1 1 #define GPIOZ_1 1
@ -149,6 +150,5 @@
#define GPIOCLK_1 116 #define GPIOCLK_1 116
#define GPIOCLK_2 117 #define GPIOCLK_2 117
#define GPIOCLK_3 118 #define GPIOCLK_3 118
#define GPIO_TEST_N 119
#endif #endif

View File

@ -25,6 +25,7 @@
#define GPIOAO_7 7 #define GPIOAO_7 7
#define GPIOAO_8 8 #define GPIOAO_8 8
#define GPIOAO_9 9 #define GPIOAO_9 9
#define GPIO_TEST_N 10
#define GPIOZ_0 0 #define GPIOZ_0 0
#define GPIOZ_1 1 #define GPIOZ_1 1
@ -126,6 +127,5 @@
#define GPIOX_18 97 #define GPIOX_18 97
#define GPIOCLK_0 98 #define GPIOCLK_0 98
#define GPIOCLK_1 99 #define GPIOCLK_1 99
#define GPIO_TEST_N 100
#endif #endif