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gpio: pci-idio-16: Utilize the idio-16 GPIO library
The ACCES PCI-IDIO-16 device is part of the ACCES IDIO-16 family, so the idio-16 GPIO library module is selected and utilized to consolidate code. Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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@ -1563,6 +1563,7 @@ config GPIO_PCH
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config GPIO_PCI_IDIO_16
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tristate "ACCES PCI-IDIO-16 GPIO support"
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select GPIOLIB_IRQCHIP
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select GPIO_IDIO_16
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help
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Enables GPIO support for the ACCES PCI-IDIO-16. An interrupt is
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generated when any of the inputs change state (low to high or high to
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@ -3,8 +3,7 @@
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* GPIO driver for the ACCES PCI-IDIO-16
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* Copyright (C) 2017 William Breathitt Gray
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*/
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#include <linux/bitmap.h>
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#include <linux/bitops.h>
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/gpio/driver.h>
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@ -16,51 +15,28 @@
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#include <linux/spinlock.h>
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#include <linux/types.h>
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/**
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* struct idio_16_gpio_reg - GPIO device registers structure
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* @out0_7: Read: FET Drive Outputs 0-7
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* Write: FET Drive Outputs 0-7
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* @in0_7: Read: Isolated Inputs 0-7
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* Write: Clear Interrupt
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* @irq_ctl: Read: Enable IRQ
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* Write: Disable IRQ
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* @filter_ctl: Read: Activate Input Filters 0-15
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* Write: Deactivate Input Filters 0-15
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* @out8_15: Read: FET Drive Outputs 8-15
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* Write: FET Drive Outputs 8-15
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* @in8_15: Read: Isolated Inputs 8-15
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* Write: Unused
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* @irq_status: Read: Interrupt status
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* Write: Unused
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*/
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struct idio_16_gpio_reg {
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u8 out0_7;
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u8 in0_7;
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u8 irq_ctl;
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u8 filter_ctl;
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u8 out8_15;
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u8 in8_15;
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u8 irq_status;
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};
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#include "gpio-idio-16.h"
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/**
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* struct idio_16_gpio - GPIO device private data structure
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* @chip: instance of the gpio_chip
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* @lock: synchronization lock to prevent I/O race conditions
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* @reg: I/O address offset for the GPIO device registers
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* @state: ACCES IDIO-16 device state
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* @irq_mask: I/O bits affected by interrupts
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*/
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struct idio_16_gpio {
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struct gpio_chip chip;
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raw_spinlock_t lock;
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struct idio_16_gpio_reg __iomem *reg;
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struct idio_16 __iomem *reg;
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struct idio_16_state state;
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unsigned long irq_mask;
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};
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static int idio_16_gpio_get_direction(struct gpio_chip *chip,
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unsigned int offset)
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{
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if (offset > 15)
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if (idio_16_get_direction(offset))
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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@ -82,43 +58,16 @@ static int idio_16_gpio_direction_output(struct gpio_chip *chip,
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static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
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unsigned long mask = BIT(offset);
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if (offset < 8)
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return !!(ioread8(&idio16gpio->reg->out0_7) & mask);
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if (offset < 16)
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return !!(ioread8(&idio16gpio->reg->out8_15) & (mask >> 8));
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if (offset < 24)
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return !!(ioread8(&idio16gpio->reg->in0_7) & (mask >> 16));
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return !!(ioread8(&idio16gpio->reg->in8_15) & (mask >> 24));
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return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset);
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}
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static int idio_16_gpio_get_multiple(struct gpio_chip *chip,
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unsigned long *mask, unsigned long *bits)
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{
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struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
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unsigned long offset;
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unsigned long gpio_mask;
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void __iomem *ports[] = {
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&idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15,
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&idio16gpio->reg->in0_7, &idio16gpio->reg->in8_15,
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};
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void __iomem *port_addr;
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unsigned long port_state;
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/* clear bits array to a clean slate */
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bitmap_zero(bits, chip->ngpio);
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for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
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port_addr = ports[offset / 8];
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port_state = ioread8(port_addr) & gpio_mask;
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bitmap_set_value8(bits, port_state, offset);
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}
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idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits);
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return 0;
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}
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@ -126,61 +75,16 @@ static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
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unsigned int mask = BIT(offset);
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void __iomem *base;
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unsigned long flags;
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unsigned int out_state;
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if (offset > 15)
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return;
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if (offset > 7) {
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mask >>= 8;
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base = &idio16gpio->reg->out8_15;
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} else
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base = &idio16gpio->reg->out0_7;
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raw_spin_lock_irqsave(&idio16gpio->lock, flags);
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if (value)
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out_state = ioread8(base) | mask;
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else
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out_state = ioread8(base) & ~mask;
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iowrite8(out_state, base);
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raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
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idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value);
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}
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static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
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unsigned long *mask, unsigned long *bits)
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{
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struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
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unsigned long offset;
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unsigned long gpio_mask;
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void __iomem *ports[] = {
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&idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15,
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};
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size_t index;
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void __iomem *port_addr;
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unsigned long bitmask;
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unsigned long flags;
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unsigned long out_state;
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for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
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index = offset / 8;
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port_addr = ports[index];
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bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
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raw_spin_lock_irqsave(&idio16gpio->lock, flags);
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out_state = ioread8(port_addr) & ~gpio_mask;
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out_state |= bitmask;
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iowrite8(out_state, port_addr);
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raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
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}
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idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits);
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}
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static void idio_16_irq_ack(struct irq_data *data)
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@ -335,6 +239,8 @@ static int idio_16_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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idio16gpio->chip.set = idio_16_gpio_set;
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idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple;
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idio_16_state_init(&idio16gpio->state);
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girq = &idio16gpio->chip.irq;
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girq->chip = &idio_16_irqchip;
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/* This will let us handle the parent IRQ in the driver */
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@ -379,3 +285,4 @@ module_pci_driver(idio_16_driver);
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MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
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MODULE_DESCRIPTION("ACCES PCI-IDIO-16 GPIO driver");
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(GPIO_IDIO_16);
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