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octeontx2-af: cn10k: Debugfs support for bandwidth profiles
Added support for dumping current resource status of bandwidth profiles and contexts of allocated profiles via debugfs. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sunil Goutham
David S. Miller
parent
e8e095b3b3
commit
e7d8971763
@ -184,6 +184,14 @@ int rvu_rsrc_free_count(struct rsrc_bmap *rsrc)
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return (rsrc->max - used);
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}
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bool is_rsrc_free(struct rsrc_bmap *rsrc, int id)
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{
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if (!rsrc->bmap)
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return false;
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return !test_bit(id, rsrc->bmap);
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}
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int rvu_alloc_bitmap(struct rsrc_bmap *rsrc)
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{
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rsrc->bmap = kcalloc(BITS_TO_LONGS(rsrc->max),
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@ -596,6 +596,7 @@ static inline bool is_rvu_fwdata_valid(struct rvu *rvu)
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int rvu_alloc_bitmap(struct rsrc_bmap *rsrc);
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int rvu_alloc_rsrc(struct rsrc_bmap *rsrc);
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void rvu_free_rsrc(struct rsrc_bmap *rsrc, int id);
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bool is_rsrc_free(struct rsrc_bmap *rsrc, int id);
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int rvu_rsrc_free_count(struct rsrc_bmap *rsrc);
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int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc);
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bool rvu_rsrc_check_contig(struct rsrc_bmap *rsrc, int nrsrc);
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@ -683,6 +684,10 @@ int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,
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struct nix_hw **nix_hw, int *blkaddr);
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int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,
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u16 rq_idx, u16 match_id);
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int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,
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struct nix_cn10k_aq_enq_req *aq_req,
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struct nix_cn10k_aq_enq_rsp *aq_rsp,
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u16 pcifunc, u8 ctype, u32 qidx);
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/* NPC APIs */
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int rvu_npc_init(struct rvu *rvu);
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@ -1632,6 +1632,165 @@ static int rvu_dbg_nix_qsize_display(struct seq_file *filp, void *unused)
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RVU_DEBUG_SEQ_FOPS(nix_qsize, nix_qsize_display, nix_qsize_write);
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static void print_band_prof_ctx(struct seq_file *m,
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struct nix_bandprof_s *prof)
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{
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char *str;
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switch (prof->pc_mode) {
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case NIX_RX_PC_MODE_VLAN:
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str = "VLAN";
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break;
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case NIX_RX_PC_MODE_DSCP:
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str = "DSCP";
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break;
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case NIX_RX_PC_MODE_GEN:
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str = "Generic";
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break;
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case NIX_RX_PC_MODE_RSVD:
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str = "Reserved";
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break;
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}
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seq_printf(m, "W0: pc_mode\t\t%s\n", str);
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str = (prof->icolor == 3) ? "Color blind" :
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(prof->icolor == 0) ? "Green" :
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(prof->icolor == 1) ? "Yellow" : "Red";
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seq_printf(m, "W0: icolor\t\t%s\n", str);
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seq_printf(m, "W0: tnl_ena\t\t%d\n", prof->tnl_ena);
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seq_printf(m, "W0: peir_exponent\t%d\n", prof->peir_exponent);
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seq_printf(m, "W0: pebs_exponent\t%d\n", prof->pebs_exponent);
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seq_printf(m, "W0: cir_exponent\t%d\n", prof->cir_exponent);
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seq_printf(m, "W0: cbs_exponent\t%d\n", prof->cbs_exponent);
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seq_printf(m, "W0: peir_mantissa\t%d\n", prof->peir_mantissa);
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seq_printf(m, "W0: pebs_mantissa\t%d\n", prof->pebs_mantissa);
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seq_printf(m, "W0: cir_mantissa\t%d\n", prof->cir_mantissa);
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seq_printf(m, "W1: cbs_mantissa\t%d\n", prof->cbs_mantissa);
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str = (prof->lmode == 0) ? "byte" : "packet";
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seq_printf(m, "W1: lmode\t\t%s\n", str);
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seq_printf(m, "W1: l_select\t\t%d\n", prof->l_sellect);
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seq_printf(m, "W1: rdiv\t\t%d\n", prof->rdiv);
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seq_printf(m, "W1: adjust_exponent\t%d\n", prof->adjust_exponent);
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seq_printf(m, "W1: adjust_mantissa\t%d\n", prof->adjust_mantissa);
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str = (prof->gc_action == 0) ? "PASS" :
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(prof->gc_action == 1) ? "DROP" : "RED";
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seq_printf(m, "W1: gc_action\t\t%s\n", str);
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str = (prof->yc_action == 0) ? "PASS" :
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(prof->yc_action == 1) ? "DROP" : "RED";
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seq_printf(m, "W1: yc_action\t\t%s\n", str);
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str = (prof->rc_action == 0) ? "PASS" :
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(prof->rc_action == 1) ? "DROP" : "RED";
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seq_printf(m, "W1: rc_action\t\t%s\n", str);
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seq_printf(m, "W1: meter_algo\t\t%d\n", prof->meter_algo);
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seq_printf(m, "W1: band_prof_id\t%d\n", prof->band_prof_id);
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seq_printf(m, "W1: hl_en\t\t%d\n", prof->hl_en);
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seq_printf(m, "W2: ts\t\t\t%lld\n", (u64)prof->ts);
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seq_printf(m, "W3: pe_accum\t\t%d\n", prof->pe_accum);
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seq_printf(m, "W3: c_accum\t\t%d\n", prof->c_accum);
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seq_printf(m, "W4: green_pkt_pass\t%lld\n",
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(u64)prof->green_pkt_pass);
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seq_printf(m, "W5: yellow_pkt_pass\t%lld\n",
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(u64)prof->yellow_pkt_pass);
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seq_printf(m, "W6: red_pkt_pass\t%lld\n", (u64)prof->red_pkt_pass);
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seq_printf(m, "W7: green_octs_pass\t%lld\n",
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(u64)prof->green_octs_pass);
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seq_printf(m, "W8: yellow_octs_pass\t%lld\n",
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(u64)prof->yellow_octs_pass);
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seq_printf(m, "W9: red_octs_pass\t%lld\n", (u64)prof->red_octs_pass);
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seq_printf(m, "W10: green_pkt_drop\t%lld\n",
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(u64)prof->green_pkt_drop);
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seq_printf(m, "W11: yellow_pkt_drop\t%lld\n",
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(u64)prof->yellow_pkt_drop);
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seq_printf(m, "W12: red_pkt_drop\t%lld\n", (u64)prof->red_pkt_drop);
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seq_printf(m, "W13: green_octs_drop\t%lld\n",
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(u64)prof->green_octs_drop);
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seq_printf(m, "W14: yellow_octs_drop\t%lld\n",
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(u64)prof->yellow_octs_drop);
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seq_printf(m, "W15: red_octs_drop\t%lld\n", (u64)prof->red_octs_drop);
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seq_puts(m, "==============================\n");
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}
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static int rvu_dbg_nix_band_prof_ctx_display(struct seq_file *m, void *unused)
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{
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struct nix_hw *nix_hw = m->private;
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struct nix_cn10k_aq_enq_req aq_req;
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struct nix_cn10k_aq_enq_rsp aq_rsp;
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struct rvu *rvu = nix_hw->rvu;
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struct nix_ipolicer *ipolicer;
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int layer, prof_idx, idx, rc;
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u16 pcifunc;
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char *str;
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for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {
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if (layer == BAND_PROF_INVAL_LAYER)
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continue;
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str = (layer == BAND_PROF_LEAF_LAYER) ? "Leaf" :
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(layer == BAND_PROF_MID_LAYER) ? "Mid" : "Top";
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seq_printf(m, "\n%s bandwidth profiles\n", str);
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seq_puts(m, "=======================\n");
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ipolicer = &nix_hw->ipolicer[layer];
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for (idx = 0; idx < ipolicer->band_prof.max; idx++) {
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if (is_rsrc_free(&ipolicer->band_prof, idx))
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continue;
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prof_idx = (idx & 0x3FFF) | (layer << 14);
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rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,
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0x00, NIX_AQ_CTYPE_BANDPROF,
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prof_idx);
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if (rc) {
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dev_err(rvu->dev,
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"%s: Failed to fetch context of %s profile %d, err %d\n",
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__func__, str, idx, rc);
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return 0;
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}
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seq_printf(m, "\n%s bandwidth profile:: %d\n", str, idx);
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pcifunc = ipolicer->pfvf_map[idx];
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if (!(pcifunc & RVU_PFVF_FUNC_MASK))
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seq_printf(m, "Allocated to :: PF %d\n",
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rvu_get_pf(pcifunc));
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else
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seq_printf(m, "Allocated to :: PF %d VF %d\n",
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rvu_get_pf(pcifunc),
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(pcifunc & RVU_PFVF_FUNC_MASK) - 1);
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print_band_prof_ctx(m, &aq_rsp.prof);
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}
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}
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return 0;
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}
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RVU_DEBUG_SEQ_FOPS(nix_band_prof_ctx, nix_band_prof_ctx_display, NULL);
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static int rvu_dbg_nix_band_prof_rsrc_display(struct seq_file *m, void *unused)
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{
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struct nix_hw *nix_hw = m->private;
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struct nix_ipolicer *ipolicer;
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int layer;
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char *str;
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seq_puts(m, "\nBandwidth profile resource free count\n");
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seq_puts(m, "=====================================\n");
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for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {
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if (layer == BAND_PROF_INVAL_LAYER)
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continue;
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str = (layer == BAND_PROF_LEAF_LAYER) ? "Leaf" :
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(layer == BAND_PROF_MID_LAYER) ? "Mid " : "Top ";
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ipolicer = &nix_hw->ipolicer[layer];
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seq_printf(m, "%s :: Max: %4d Free: %4d\n", str,
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ipolicer->band_prof.max,
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rvu_rsrc_free_count(&ipolicer->band_prof));
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}
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seq_puts(m, "=====================================\n");
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return 0;
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}
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RVU_DEBUG_SEQ_FOPS(nix_band_prof_rsrc, nix_band_prof_rsrc_display, NULL);
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static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)
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{
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struct nix_hw *nix_hw;
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@ -1664,6 +1823,10 @@ static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)
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&rvu_dbg_nix_ndc_rx_hits_miss_fops);
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debugfs_create_file("qsize", 0600, rvu->rvu_dbg.nix, rvu,
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&rvu_dbg_nix_qsize_fops);
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debugfs_create_file("ingress_policer_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
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&rvu_dbg_nix_band_prof_ctx_fops);
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debugfs_create_file("ingress_policer_rsrc", 0600, rvu->rvu_dbg.nix, nix_hw,
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&rvu_dbg_nix_band_prof_rsrc_fops);
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}
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static void rvu_dbg_npa_init(struct rvu *rvu)
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@ -4365,10 +4365,10 @@ int rvu_mbox_handler_nix_bandprof_free(struct rvu *rvu,
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return 0;
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}
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static int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,
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struct nix_cn10k_aq_enq_req *aq_req,
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struct nix_cn10k_aq_enq_rsp *aq_rsp,
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u16 pcifunc, u8 ctype, u32 qidx)
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int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,
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struct nix_cn10k_aq_enq_req *aq_req,
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struct nix_cn10k_aq_enq_rsp *aq_rsp,
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u16 pcifunc, u8 ctype, u32 qidx)
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{
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memset(aq_req, 0, sizeof(struct nix_cn10k_aq_enq_req));
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aq_req->hdr.pcifunc = pcifunc;
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@ -679,6 +679,13 @@ enum NIX_RX_BAND_PROF_ACTIONRESULT_E {
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NIX_RX_BAND_PROF_ACTIONRESULT_RED = 0x2,
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};
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enum nix_band_prof_pc_mode {
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NIX_RX_PC_MODE_VLAN = 0,
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NIX_RX_PC_MODE_DSCP = 1,
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NIX_RX_PC_MODE_GEN = 2,
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NIX_RX_PC_MODE_RSVD = 3,
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};
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/* NIX ingress policer bandwidth profile structure */
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struct nix_bandprof_s {
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uint64_t pc_mode : 2; /* W0 */
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