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gpio: merrifield: Add support for hardware debouncer

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By default all pins are configured to use a glitch filter. Writing 1 to the
certain bit of the specific register might be useful in case someone needs to
bypass the glitch filter completely for a given GPIO pin.

This patch adds support for that in the Intel Merrifield GPIO driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Andy Shevchenko 2016-12-01 17:45:51 +02:00 committed by Linus Walleij
parent f4e81c5297
commit e7a718f9b1
1 changed files with 22 additions and 0 deletions
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22
drivers/gpio/gpio-merrifield.c
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@ -161,6 +161,27 @@ static int mrfld_gpio_direction_output(struct gpio_chip *chip,
return 0;
}
static int mrfld_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
unsigned int debounce)
{
struct mrfld_gpio *priv = gpiochip_get_data(chip);
void __iomem *gfbr = gpio_reg(chip, offset, GFBR);
unsigned long flags;
u32 value;
raw_spin_lock_irqsave(&priv->lock, flags);
if (debounce)
value = readl(gfbr) & ~BIT(offset % 32);
else
value = readl(gfbr) | BIT(offset % 32);
writel(value, gfbr);
raw_spin_unlock_irqrestore(&priv->lock, flags);
return 0;
}
static void mrfld_irq_ack(struct irq_data *d)
{
struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
@ -384,6 +405,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
priv->chip.direction_output = mrfld_gpio_direction_output;
priv->chip.get = mrfld_gpio_get;
priv->chip.set = mrfld_gpio_set;
priv->chip.set_debounce = mrfld_gpio_set_debounce;
priv->chip.base = gpio_base;
priv->chip.ngpio = MRFLD_NGPIO;
priv->chip.can_sleep = false;