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ARM: dts: brcmstb: add BCM7445 GPIO nodes
Need the aon_pm_l2_intc and irq0_aon_intc descriptions, so included those as well. Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -109,6 +109,20 @@
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brcm,int-fwd-mask = <0x70000>;
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};
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irq0_aon_intc: interrupt-controller@417280 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x417280 0x8>;
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interrupt-parent = <&gic>;
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupts = <GIC_SPI 0x46 0x0>,
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<GIC_SPI 0x44 0x0>,
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<GIC_SPI 0x49 0x0>;
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brcm,int-map-mask = <0x1e3 0x18000000 0x100000>;
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brcm,int-fwd-mask = <0x0>;
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brcm,irq-can-wake;
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};
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hif_intr2_intc: interrupt-controller@3e1000 {
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compatible = "brcm,l2-intc";
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reg = <0x3e1000 0x30>;
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@ -119,6 +133,16 @@
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interrupt-names = "hif";
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};
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aon_pm_l2_intc: interrupt-controller@410640 {
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compatible = "brcm,l2-intc";
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reg = <0x410640 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupts = <GIC_SPI 0x40 0x0>;
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interrupt-parent = <&gic>;
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brcm,irq-can-wake;
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};
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nand: nand@3e2800 {
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status = "disabled";
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#address-cells = <1>;
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@ -167,6 +191,32 @@
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#phy-cells = <0>;
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};
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};
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upg_gio: gpio@40a700 {
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compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
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reg = <0x40a700 0x80>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 24>;
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};
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upg_gio_aon: gpio@4172c0 {
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compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
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reg = <0x4172c0 0x40>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupts-extended = <&irq0_aon_intc 0x6>,
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<&aon_pm_l2_intc 0x5>;
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wakeup-source;
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brcm,gpio-bank-widths = <18 4>;
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};
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};
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smpboot {
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