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drm/i915/xelpd: Support 128k plane stride

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XE_LPD supports plane strides up to 128KB.

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-7-imre.deak@intel.com
This commit is contained in:
Juha-Pekka Heikkilä 2021-05-06 19:19:26 +03:00 committed by Imre Deak
parent ad2f92c9f0
commit e7367af1ee
2 changed files with 39 additions and 9 deletions
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46
drivers/gpu/drm/i915/display/skl_universal_plane.c
View File

@ -482,17 +482,35 @@ skl_plane_max_stride(struct intel_plane *plane,
u32 pixel_format, u64 modifier,
unsigned int rotation)
{
struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_format_info *info = drm_format_info(pixel_format);
int cpp = info->cpp[0];
int max_horizontal_pixels = 8192;
int max_stride_bytes;
if (DISPLAY_VER(i915) >= 13) {
/*
* The stride in bytes must not exceed of the size
* of 128K bytes. For pixel formats of 64bpp will allow
* for a 16K pixel surface.
*/
max_stride_bytes = 131072;
if (cpp == 8)
max_horizontal_pixels = 16384;
else
max_horizontal_pixels = 65536;
} else {
/*
* "The stride in bytes must not exceed the
* of the size of 8K pixels and 32K bytes."
*/
max_stride_bytes = 32768;
}
/*
* "The stride in bytes must not exceed the
* of the size of 8K pixels and 32K bytes."
*/
if (drm_rotation_90_or_270(rotation))
return min(8192, 32768 / cpp);
return min(max_horizontal_pixels, max_stride_bytes / cpp);
else
return min(8192 * cpp, 32768);
return min(max_horizontal_pixels * cpp, max_stride_bytes);
}
@ -1457,7 +1475,10 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
}
}
drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
if (DISPLAY_VER(dev_priv) >= 13)
drm_WARN_ON(&dev_priv->drm, x > 65535 || y > 65535);
else
drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = x;
@ -1531,7 +1552,10 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
}
}
drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
if (DISPLAY_VER(i915) >= 13)
drm_WARN_ON(&i915->drm, x > 65535 || y > 65535);
else
drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[uv_plane].offset = offset;
plane_state->view.color_plane[uv_plane].x = x;
@ -2244,7 +2268,11 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
fb->pitches[0] = (val & 0x3ff) * stride_mult;
if (DISPLAY_VER(dev_priv) >= 13)
fb->pitches[0] = (val & PLANE_STRIDE_MASK_XELPD) * stride_mult;
else
fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
aligned_height = intel_fb_align_height(fb, 0, fb->height);

2
drivers/gpu/drm/i915/i915_reg.h
View File

@ -7206,6 +7206,8 @@ enum {
_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
#define PLANE_STRIDE(pipe, plane) \
_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
#define PLANE_STRIDE_MASK REG_GENMASK(10, 0)
#define PLANE_STRIDE_MASK_XELPD REG_GENMASK(11, 0)
#define _PLANE_POS_1_B 0x7118c
#define _PLANE_POS_2_B 0x7128c