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pinctrl: cherryview: Read triggering type from HW if not set when requested
If a driver does not set interrupt triggering type when it calls request_irq(), it means use the pin as the hardware/firmware has configured it. There are some drivers doing this. One example is drivers/input/serio/i8042.c that requests the interrupt like: error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, "i8042", i8042_platform_device); It assumes the interrupt is already properly configured. This is true in case of interrupts connected to the IO-APIC. However, some Intel Braswell/Cherryview based machines use a GPIO here instead for the internal keyboard controller. This is a problem because even if the pin/interrupt is properly configured, the irqchip ->irq_set_type() will never be called as the triggering flags are 0. Because of that we do not have correct interrupt flow handler set for the interrupt. Fix this by adding a custom ->irq_startup() that checks if the interrupt has no triggering type set and in that case read the type directly from the hardware and install correct flow handler along with the mapping. Reported-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reported-by: Freddy Paul <freddy.paul@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -1292,6 +1292,49 @@ static void chv_gpio_irq_unmask(struct irq_data *d)
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chv_gpio_irq_mask_unmask(d, false);
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}
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static unsigned chv_gpio_irq_startup(struct irq_data *d)
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{
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/*
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* Check if the interrupt has been requested with 0 as triggering
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* type. In that case it is assumed that the current values
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* programmed to the hardware are used (e.g BIOS configured
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* defaults).
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*
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* In that case ->irq_set_type() will never be called so we need to
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* read back the values from hardware now, set correct flow handler
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* and update mappings before the interrupt is being used.
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*/
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if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) {
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
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unsigned offset = irqd_to_hwirq(d);
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int pin = chv_gpio_offset_to_pin(pctrl, offset);
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irq_flow_handler_t handler;
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unsigned long flags;
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u32 intsel, value;
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intsel = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0));
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intsel &= CHV_PADCTRL0_INTSEL_MASK;
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intsel >>= CHV_PADCTRL0_INTSEL_SHIFT;
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value = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1));
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if (value & CHV_PADCTRL1_INTWAKECFG_LEVEL)
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handler = handle_level_irq;
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else
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handler = handle_edge_irq;
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spin_lock_irqsave(&pctrl->lock, flags);
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if (!pctrl->intr_lines[intsel]) {
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__irq_set_handler_locked(d->irq, handler);
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pctrl->intr_lines[intsel] = offset;
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}
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spin_unlock_irqrestore(&pctrl->lock, flags);
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}
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chv_gpio_irq_unmask(d);
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return 0;
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}
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static int chv_gpio_irq_type(struct irq_data *d, unsigned type)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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@ -1357,6 +1400,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned type)
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static struct irq_chip chv_gpio_irqchip = {
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.name = "chv-gpio",
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.irq_startup = chv_gpio_irq_startup,
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.irq_ack = chv_gpio_irq_ack,
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.irq_mask = chv_gpio_irq_mask,
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.irq_unmask = chv_gpio_irq_unmask,
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