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iio: accel: Add support for Kionix/ROHM KX132-1211 accelerometer
Kionix KX132-1211 is a tri-axis 16-bit accelerometer that can support ranges from ±2G to ±16G, digital output through I²C/SPI. Add support for basic accelerometer features such as reading acceleration via IIO using raw reads, triggered buffer (data-ready), or the WMI IRQ. Datasheet: https://kionixfs.azureedge.net/en/document/KX132-1211-Technical-Reference-Manual-Rev-5.0.pdf Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mehdi Djait <mehdi.djait.k@gmail.com> Link: https://lore.kernel.org/r/389a7d6100ff2e71b1c5d60bebe662d09435996a.1694867379.git.mehdi.djait.k@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Mehdi Djait
Jonathan Cameron
parent
774c3fabc9
commit
e631f61f76
@ -418,8 +418,9 @@ config IIO_KX022A_SPI
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select IIO_KX022A
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select REGMAP_SPI
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help
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Enable support for the Kionix KX022A digital tri-axis
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accelerometer connected to I2C interface.
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Enable support for the Kionix digital tri-axis accelerometers
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connected to SPI interface. Supported devices are:
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KX022A, KX132-1211
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config IIO_KX022A_I2C
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tristate "Kionix KX022A tri-axis digital accelerometer I2C interface"
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@ -427,8 +428,9 @@ config IIO_KX022A_I2C
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select IIO_KX022A
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select REGMAP_I2C
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help
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Enable support for the Kionix KX022A digital tri-axis
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accelerometer connected to I2C interface.
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Enable support for the Kionix digital tri-axis accelerometers
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connected to I2C interface. Supported devices are:
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KX022A, KX132-1211
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config KXSD9
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tristate "Kionix KXSD9 Accelerometer Driver"
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@ -37,12 +37,14 @@ static int kx022a_i2c_probe(struct i2c_client *i2c)
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static const struct i2c_device_id kx022a_i2c_id[] = {
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{ .name = "kx022a", .driver_data = (kernel_ulong_t)&kx022a_chip_info },
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{ .name = "kx132-1211", .driver_data = (kernel_ulong_t)&kx132_chip_info },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, kx022a_i2c_id);
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static const struct of_device_id kx022a_of_match[] = {
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{ .compatible = "kionix,kx022a", .data = &kx022a_chip_info },
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{ .compatible = "kionix,kx132-1211", .data = &kx132_chip_info },
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{ }
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};
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MODULE_DEVICE_TABLE(of, kx022a_of_match);
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@ -37,12 +37,14 @@ static int kx022a_spi_probe(struct spi_device *spi)
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static const struct spi_device_id kx022a_id[] = {
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{ .name = "kx022a", .driver_data = (kernel_ulong_t)&kx022a_chip_info },
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{ .name = "kx132-1211", .driver_data = (kernel_ulong_t)&kx132_chip_info },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, kx022a_id);
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static const struct of_device_id kx022a_of_match[] = {
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{ .compatible = "kionix,kx022a", .data = &kx022a_chip_info },
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{ .compatible = "kionix,kx132-1211", .data = &kx132_chip_info },
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{ }
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};
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MODULE_DEVICE_TABLE(of, kx022a_of_match);
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@ -150,6 +150,117 @@ static const struct regmap_config kx022a_regmap_config = {
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.cache_type = REGCACHE_RBTREE,
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};
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/* Regmap configs kx132 */
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static const struct regmap_range kx132_volatile_ranges[] = {
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{
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.range_min = KX132_REG_XADP_L,
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.range_max = KX132_REG_COTR,
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}, {
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.range_min = KX132_REG_TSCP,
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.range_max = KX132_REG_INT_REL,
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}, {
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/* The reset bit will be cleared by sensor */
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.range_min = KX132_REG_CNTL2,
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.range_max = KX132_REG_CNTL2,
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}, {
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.range_min = KX132_REG_CNTL5,
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.range_max = KX132_REG_CNTL5,
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}, {
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.range_min = KX132_REG_BUF_STATUS_1,
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.range_max = KX132_REG_BUF_READ,
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},
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};
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static const struct regmap_access_table kx132_volatile_regs = {
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.yes_ranges = &kx132_volatile_ranges[0],
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.n_yes_ranges = ARRAY_SIZE(kx132_volatile_ranges),
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};
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static const struct regmap_range kx132_precious_ranges[] = {
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{
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.range_min = KX132_REG_INT_REL,
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.range_max = KX132_REG_INT_REL,
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},
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};
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static const struct regmap_access_table kx132_precious_regs = {
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.yes_ranges = &kx132_precious_ranges[0],
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.n_yes_ranges = ARRAY_SIZE(kx132_precious_ranges),
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};
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static const struct regmap_range kx132_read_only_ranges[] = {
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{
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.range_min = KX132_REG_XADP_L,
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.range_max = KX132_REG_INT_REL,
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}, {
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.range_min = KX132_REG_BUF_STATUS_1,
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.range_max = KX132_REG_BUF_STATUS_2,
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}, {
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.range_min = KX132_REG_BUF_READ,
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.range_max = KX132_REG_BUF_READ,
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}, {
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/* Kionix reserved registers: should not be written */
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.range_min = 0x28,
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.range_max = 0x28,
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}, {
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.range_min = 0x35,
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.range_max = 0x36,
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}, {
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.range_min = 0x3c,
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.range_max = 0x48,
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}, {
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.range_min = 0x4e,
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.range_max = 0x5c,
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}, {
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.range_min = 0x77,
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.range_max = 0x7f,
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},
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};
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static const struct regmap_access_table kx132_ro_regs = {
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.no_ranges = &kx132_read_only_ranges[0],
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.n_no_ranges = ARRAY_SIZE(kx132_read_only_ranges),
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};
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static const struct regmap_range kx132_write_only_ranges[] = {
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{
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.range_min = KX132_REG_SELF_TEST,
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.range_max = KX132_REG_SELF_TEST,
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}, {
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.range_min = KX132_REG_BUF_CLEAR,
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.range_max = KX132_REG_BUF_CLEAR,
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},
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};
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static const struct regmap_access_table kx132_wo_regs = {
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.no_ranges = &kx132_write_only_ranges[0],
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.n_no_ranges = ARRAY_SIZE(kx132_write_only_ranges),
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};
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static const struct regmap_range kx132_noinc_read_ranges[] = {
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{
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.range_min = KX132_REG_BUF_READ,
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.range_max = KX132_REG_BUF_READ,
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},
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};
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static const struct regmap_access_table kx132_nir_regs = {
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.yes_ranges = &kx132_noinc_read_ranges[0],
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.n_yes_ranges = ARRAY_SIZE(kx132_noinc_read_ranges),
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};
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static const struct regmap_config kx132_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.volatile_table = &kx132_volatile_regs,
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.rd_table = &kx132_wo_regs,
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.wr_table = &kx132_ro_regs,
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.rd_noinc_table = &kx132_nir_regs,
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.precious_table = &kx132_precious_regs,
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.max_register = KX132_MAX_REGISTER,
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.cache_type = REGCACHE_RBTREE,
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};
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struct kx022a_data {
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struct regmap *regmap;
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const struct kx022a_chip_info *chip_info;
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@ -239,6 +350,13 @@ static const struct iio_chan_spec kx022a_channels[] = {
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IIO_CHAN_SOFT_TIMESTAMP(3),
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};
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static const struct iio_chan_spec kx132_channels[] = {
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KX022A_ACCEL_CHAN(X, KX132_REG_XOUT_L, 0),
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KX022A_ACCEL_CHAN(Y, KX132_REG_YOUT_L, 1),
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KX022A_ACCEL_CHAN(Z, KX132_REG_ZOUT_L, 2),
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IIO_CHAN_SOFT_TIMESTAMP(3),
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};
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/*
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* The sensor HW can support ODR up to 1600 Hz, which is beyond what most of the
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* Linux CPUs can handle without dropping samples. Also, the low power mode is
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@ -601,6 +719,26 @@ static int kx022a_get_fifo_bytes_available(struct kx022a_data *data)
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return fifo_bytes;
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}
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static int kx132_get_fifo_bytes_available(struct kx022a_data *data)
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{
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__le16 buf_status;
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int ret, fifo_bytes;
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ret = regmap_bulk_read(data->regmap, data->chip_info->buf_status1,
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&buf_status, sizeof(buf_status));
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if (ret) {
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dev_err(data->dev, "Error reading buffer status\n");
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return ret;
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}
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fifo_bytes = le16_to_cpu(buf_status);
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fifo_bytes &= data->chip_info->buf_smp_lvl_mask;
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fifo_bytes = min((unsigned int)fifo_bytes, data->chip_info->fifo_length *
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KX022A_FIFO_SAMPLES_SIZE_BYTES);
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return fifo_bytes;
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}
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static int __kx022a_fifo_flush(struct iio_dev *idev, unsigned int samples,
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bool irq)
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{
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@ -1024,6 +1162,32 @@ const struct kx022a_chip_info kx022a_chip_info = {
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};
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EXPORT_SYMBOL_NS_GPL(kx022a_chip_info, IIO_KX022A);
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const struct kx022a_chip_info kx132_chip_info = {
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.name = "kx132-1211",
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.regmap_config = &kx132_regmap_config,
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.channels = kx132_channels,
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.num_channels = ARRAY_SIZE(kx132_channels),
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.fifo_length = KX132_FIFO_LENGTH,
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.who = KX132_REG_WHO,
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.id = KX132_ID,
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.cntl = KX132_REG_CNTL,
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.cntl2 = KX132_REG_CNTL2,
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.odcntl = KX132_REG_ODCNTL,
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.buf_cntl1 = KX132_REG_BUF_CNTL1,
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.buf_cntl2 = KX132_REG_BUF_CNTL2,
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.buf_clear = KX132_REG_BUF_CLEAR,
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.buf_status1 = KX132_REG_BUF_STATUS_1,
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.buf_smp_lvl_mask = KX132_MASK_BUF_SMP_LVL,
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.buf_read = KX132_REG_BUF_READ,
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.inc1 = KX132_REG_INC1,
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.inc4 = KX132_REG_INC4,
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.inc5 = KX132_REG_INC5,
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.inc6 = KX132_REG_INC6,
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.xout_l = KX132_REG_XOUT_L,
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.get_fifo_bytes_available = kx132_get_fifo_bytes_available,
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};
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EXPORT_SYMBOL_NS_GPL(kx132_chip_info, IIO_KX022A);
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int kx022a_probe_internal(struct device *dev, const struct kx022a_chip_info *chip_info)
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{
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static const char * const regulator_names[] = {"io-vdd", "vdd"};
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@ -74,6 +74,57 @@
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#define KX022A_REG_SELF_TEST 0x60
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#define KX022A_MAX_REGISTER 0x60
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#define KX132_REG_WHO 0x13
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#define KX132_ID 0x3d
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#define KX132_FIFO_LENGTH 86
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#define KX132_REG_CNTL 0x1b
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#define KX132_REG_CNTL2 0x1c
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#define KX132_REG_CNTL5 0x1f
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#define KX132_MASK_RES BIT(6)
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#define KX132_GSEL_2 0x0
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#define KX132_GSEL_4 BIT(3)
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#define KX132_GSEL_8 BIT(4)
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#define KX132_GSEL_16 GENMASK(4, 3)
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#define KX132_REG_INS2 0x17
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#define KX132_MASK_INS2_WMI BIT(5)
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#define KX132_REG_XADP_L 0x02
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#define KX132_REG_XOUT_L 0x08
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#define KX132_REG_YOUT_L 0x0a
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#define KX132_REG_ZOUT_L 0x0c
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#define KX132_REG_COTR 0x12
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#define KX132_REG_TSCP 0x14
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#define KX132_REG_INT_REL 0x1a
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#define KX132_REG_ODCNTL 0x21
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#define KX132_REG_BTS_WUF_TH 0x4a
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#define KX132_REG_BUF_CNTL1 0x5e
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#define KX132_REG_BUF_CNTL2 0x5f
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#define KX132_REG_BUF_STATUS_1 0x60
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#define KX132_REG_BUF_STATUS_2 0x61
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#define KX132_MASK_BUF_SMP_LVL GENMASK(9, 0)
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#define KX132_REG_BUF_CLEAR 0x62
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#define KX132_REG_BUF_READ 0x63
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#define KX132_ODR_SHIFT 3
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#define KX132_FIFO_MAX_WMI_TH 86
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#define KX132_REG_INC1 0x22
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#define KX132_REG_INC5 0x26
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#define KX132_REG_INC6 0x27
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#define KX132_IPOL_LOW 0
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#define KX132_IPOL_HIGH KX022A_MASK_IPOL
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#define KX132_ITYP_PULSE KX022A_MASK_ITYP
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#define KX132_REG_INC4 0x25
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#define KX132_REG_SELF_TEST 0x5d
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#define KX132_MAX_REGISTER 0x76
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struct device;
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struct kx022a_data;
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@ -86,6 +137,7 @@ struct kx022a_data;
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* @channels: pointer to iio_chan_spec array
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* @num_channels: number of iio_chan_spec channels
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* @fifo_length: number of 16-bit samples in a full buffer
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* @buf_smp_lvl_mask: buffer sample level mask
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* @who: WHO_AM_I register
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* @id: WHO_AM_I register value
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* @cntl: control register 1
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@ -111,6 +163,7 @@ struct kx022a_chip_info {
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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unsigned int fifo_length;
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u16 buf_smp_lvl_mask;
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u8 who;
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u8 id;
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u8 cntl;
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@ -132,5 +185,6 @@ struct kx022a_chip_info {
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int kx022a_probe_internal(struct device *dev, const struct kx022a_chip_info *chip_info);
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extern const struct kx022a_chip_info kx022a_chip_info;
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extern const struct kx022a_chip_info kx132_chip_info;
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#endif
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