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drm/amd/display: Disable uclk pstate for subvp pipes

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[Description]
When subvp is in use, main pipes should block unintended natural uclk pstate
changes to prevent disruption to the state machine.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dillon Varone 2022-11-23 10:44:16 -05:00 committed by Alex Deucher
parent 54e9ea3d5d
commit e61aebe387
1 changed files with 5 additions and 5 deletions
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10
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
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@ -703,11 +703,7 @@ void dcn32_subvp_update_force_pstate(struct dc *dc, struct dc_state *context)
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
// For SubVP + DRR, also force disallow on the DRR pipe
// (We will force allow in the DMUB sequence -- some DRR timings by default won't allow P-State so we have
// to force once the vblank is stretched).
if (pipe->stream && pipe->plane_state && (pipe->stream->mall_stream_config.type == SUBVP_MAIN ||
(pipe->stream->mall_stream_config.type == SUBVP_NONE && pipe->stream->ignore_msa_timing_param))) {
if (pipe->stream && pipe->plane_state && (pipe->stream->mall_stream_config.type == SUBVP_MAIN)) {
struct hubp *hubp = pipe->plane_res.hubp;
if (hubp && hubp->funcs->hubp_update_force_pstate_disallow)
@ -785,6 +781,10 @@ void dcn32_program_mall_pipe_config(struct dc *dc, struct dc_state *context)
if (hws && hws->funcs.update_mall_sel)
hws->funcs.update_mall_sel(dc, context);
//update subvp force pstate
if (hws && hws->funcs.subvp_update_force_pstate)
dc->hwseq->funcs.subvp_update_force_pstate(dc, context);
// Program FORCE_ONE_ROW_FOR_FRAME and CURSOR_REQ_MODE for main subvp pipes
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];