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clk: qcom: krait-cc: handle secondary mux sourcing out of acpu_aux

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Some bootloader may leave the system in an even more undefined state
with the secondary mux of L2 or other cores sourcing out of the acpu_aux
parent. This results in the clk set to the PXO rate or a PLL8 rate.

The current logic to reset the mux and set them to a defined state only
handle if the mux are configured to source out of QSB. Change this and
force a new and defined state if the current clk is lower than the aux
rate. This way we can handle any wrong configuration where the mux is
sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1),
PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz).

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221109005631.3189-3-ansuelsmth@gmail.com
This commit is contained in:
Christian Marangi 2022-11-09 01:56:29 +01:00 committed by Bjorn Andersson
parent 18ae57b1e8
commit e5dc1a4c01
1 changed files with 4 additions and 4 deletions
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8
drivers/clk/qcom/krait-cc.c
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@ -383,8 +383,8 @@ static int krait_cc_probe(struct platform_device *pdev)
*/ */
cur_rate = clk_get_rate(l2_pri_mux_clk); cur_rate = clk_get_rate(l2_pri_mux_clk);
aux_rate = 384000000; aux_rate = 384000000;
if (cur_rate == 1) { if (cur_rate < aux_rate) {
pr_info("L2 @ QSB rate. Forcing new rate.\n"); pr_info("L2 @ Undefined rate. Forcing new rate.\n");
cur_rate = aux_rate; cur_rate = aux_rate;
} }
clk_set_rate(l2_pri_mux_clk, aux_rate); clk_set_rate(l2_pri_mux_clk, aux_rate);
@ -394,8 +394,8 @@ static int krait_cc_probe(struct platform_device *pdev)
for_each_possible_cpu(cpu) { for_each_possible_cpu(cpu) {
clk = clks[cpu]; clk = clks[cpu];
cur_rate = clk_get_rate(clk); cur_rate = clk_get_rate(clk);
if (cur_rate == 1) { if (cur_rate < aux_rate) {
pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
cur_rate = aux_rate; cur_rate = aux_rate;
} }