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clk: introduce clk_set_phase function & callback
A common operation for a clock signal generator is to shift the phase of that signal. This patch introduces a new function to the clk.h API to dynamically adjust the phase of a clock signal. Additionally this patch introduces support for the new function in the common clock framework via the .set_phase call back in struct clk_ops. Signed-off-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Hans de Goede <hdegoede@redhat.com>
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@ -117,11 +117,11 @@ static void clk_summary_show_one(struct seq_file *s, struct clk *c, int level)
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if (!c)
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return;
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seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu\n",
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seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
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level * 3 + 1, "",
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30 - level * 3, c->name,
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c->enable_count, c->prepare_count, clk_get_rate(c),
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clk_get_accuracy(c));
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clk_get_accuracy(c), clk_get_phase(c));
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}
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static void clk_summary_show_subtree(struct seq_file *s, struct clk *c,
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@ -143,8 +143,8 @@ static int clk_summary_show(struct seq_file *s, void *data)
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struct clk *c;
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struct hlist_head **lists = (struct hlist_head **)s->private;
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seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy\n");
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seq_puts(s, "--------------------------------------------------------------------------------\n");
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seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
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seq_puts(s, "----------------------------------------------------------------------------------------\n");
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clk_prepare_lock();
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@ -180,6 +180,7 @@ static void clk_dump_one(struct seq_file *s, struct clk *c, int level)
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seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
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seq_printf(s, "\"rate\": %lu", clk_get_rate(c));
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seq_printf(s, "\"accuracy\": %lu", clk_get_accuracy(c));
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seq_printf(s, "\"phase\": %d", clk_get_phase(c));
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}
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static void clk_dump_subtree(struct seq_file *s, struct clk *c, int level)
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@ -264,6 +265,11 @@ static int clk_debug_create_one(struct clk *clk, struct dentry *pdentry)
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if (!d)
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goto err_out;
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d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry,
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(u32 *)&clk->phase);
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if (!d)
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goto err_out;
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d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry,
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(u32 *)&clk->flags);
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if (!d)
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@ -1738,6 +1744,77 @@ out:
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}
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EXPORT_SYMBOL_GPL(clk_set_parent);
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/**
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* clk_set_phase - adjust the phase shift of a clock signal
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* @clk: clock signal source
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* @degrees: number of degrees the signal is shifted
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*
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* Shifts the phase of a clock signal by the specified
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* degrees. Returns 0 on success, -EERROR otherwise.
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*
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* This function makes no distinction about the input or reference
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* signal that we adjust the clock signal phase against. For example
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* phase locked-loop clock signal generators we may shift phase with
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* respect to feedback clock signal input, but for other cases the
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* clock phase may be shifted with respect to some other, unspecified
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* signal.
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*
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* Additionally the concept of phase shift does not propagate through
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* the clock tree hierarchy, which sets it apart from clock rates and
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* clock accuracy. A parent clock phase attribute does not have an
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* impact on the phase attribute of a child clock.
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*/
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int clk_set_phase(struct clk *clk, int degrees)
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{
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int ret = 0;
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if (!clk)
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goto out;
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/* sanity check degrees */
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degrees %= 360;
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if (degrees < 0)
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degrees += 360;
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clk_prepare_lock();
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if (!clk->ops->set_phase)
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goto out_unlock;
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ret = clk->ops->set_phase(clk->hw, degrees);
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if (!ret)
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clk->phase = degrees;
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out_unlock:
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clk_prepare_unlock();
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out:
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return ret;
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}
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/**
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* clk_get_phase - return the phase shift of a clock signal
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* @clk: clock signal source
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*
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* Returns the phase shift of a clock node in degrees, otherwise returns
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* -EERROR.
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*/
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int clk_get_phase(struct clk *clk)
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{
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int ret = 0;
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if (!clk)
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goto out;
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clk_prepare_lock();
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ret = clk->phase;
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clk_prepare_unlock();
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out:
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return ret;
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}
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/**
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* __clk_init - initialize the data structures in a struct clk
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* @dev: device initializing this clk, placeholder for now
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@ -46,6 +46,7 @@ struct clk {
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unsigned int enable_count;
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unsigned int prepare_count;
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unsigned long accuracy;
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int phase;
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struct hlist_head children;
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struct hlist_node child_node;
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unsigned int notifier_count;
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@ -129,6 +129,10 @@ struct dentry;
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* set then clock accuracy will be initialized to parent accuracy
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* or 0 (perfect clock) if clock has no parent.
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*
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* @set_phase: Shift the phase this clock signal in degrees specified
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* by the second argument. Valid values for degrees are
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* 0-359. Return 0 on success, otherwise -EERROR.
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*
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* @init: Perform platform-specific initialization magic.
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* This is not not used by any of the basic clock types.
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* Please consider other ways of solving initialization problems
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@ -177,6 +181,7 @@ struct clk_ops {
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unsigned long parent_rate, u8 index);
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unsigned long (*recalc_accuracy)(struct clk_hw *hw,
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unsigned long parent_accuracy);
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int (*set_phase)(struct clk_hw *hw, int degrees);
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void (*init)(struct clk_hw *hw);
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int (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
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};
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@ -106,6 +106,25 @@ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb);
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*/
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long clk_get_accuracy(struct clk *clk);
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/**
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* clk_set_phase - adjust the phase shift of a clock signal
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* @clk: clock signal source
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* @degrees: number of degrees the signal is shifted
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*
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* Shifts the phase of a clock signal by the specified degrees. Returns 0 on
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* success, -EERROR otherwise.
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*/
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int clk_set_phase(struct clk *clk, int degrees);
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/**
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* clk_get_phase - return the phase shift of a clock signal
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* @clk: clock signal source
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*
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* Returns the phase shift of a clock node in degrees, otherwise returns
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* -EERROR.
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*/
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int clk_get_phase(struct clk *clk);
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#else
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static inline long clk_get_accuracy(struct clk *clk)
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@ -113,6 +132,16 @@ static inline long clk_get_accuracy(struct clk *clk)
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return -ENOTSUPP;
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}
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static inline long clk_set_phase(struct clk *clk, int phase)
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{
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return -ENOTSUPP;
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}
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static inline long clk_get_phase(struct clk *clk)
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{
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return -ENOTSUPP;
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}
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#endif
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/**
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