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dt-bindings: mmc: sdhci-am654: cleanup style
Cleanup coding style without functional changes: 1. Drop unnecessary quotes from $ref. 2. Use simple enum for compatible enumeration and sort entries. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221204094717.74016-2-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Krzysztof Kozlowski
Ulf Hansson
parent
07f8f060ed
commit
e589522d7a
@ -2,8 +2,8 @@
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# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: TI AM654 MMC Controller
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@ -16,12 +16,13 @@ allOf:
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properties:
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compatible:
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oneOf:
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- const: ti,am654-sdhci-5.1
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- const: ti,j721e-sdhci-8bit
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- const: ti,j721e-sdhci-4bit
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- const: ti,am64-sdhci-8bit
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- const: ti,am64-sdhci-4bit
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- const: ti,am62-sdhci
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- enum:
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- ti,am62-sdhci
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- ti,am64-sdhci-4bit
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- ti,am64-sdhci-8bit
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- ti,am654-sdhci-5.1
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- ti,j721e-sdhci-4bit
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- ti,j721e-sdhci-8bit
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- items:
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- const: ti,j7200-sdhci-8bit
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- const: ti,j721e-sdhci-8bit
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@ -59,67 +60,67 @@ properties:
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ti,otap-del-sel-legacy:
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description: Output tap delay for SD/MMC legacy timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-mmc-hs:
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description: Output tap delay for MMC high speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-sd-hs:
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description: Output tap delay for SD high speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-sdr12:
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description: Output tap delay for SD UHS SDR12 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-sdr25:
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description: Output tap delay for SD UHS SDR25 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-sdr50:
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description: Output tap delay for SD UHS SDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-sdr104:
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description: Output tap delay for SD UHS SDR104 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-ddr50:
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description: Output tap delay for SD UHS DDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-ddr52:
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description: Output tap delay for eMMC DDR52 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-hs200:
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description: Output tap delay for eMMC HS200 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,otap-del-sel-hs400:
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description: Output tap delay for eMMC HS400 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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@ -129,55 +130,55 @@ properties:
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ti,itap-del-sel-legacy:
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description: Input tap delay for SD/MMC legacy timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,itap-del-sel-mmc-hs:
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description: Input tap delay for MMC high speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,itap-del-sel-sd-hs:
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description: Input tap delay for SD high speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,itap-del-sel-sdr12:
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description: Input tap delay for SD UHS SDR12 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,itap-del-sel-sdr25:
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description: Input tap delay for SD UHS SDR25 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,itap-del-sel-ddr50:
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description: Input tap delay for MMC DDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,itap-del-sel-ddr52:
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description: Input tap delay for MMC DDR52 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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ti,trm-icp:
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description: DLL trim select
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xf
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ti,driver-strength-ohm:
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description: DLL drive strength in ohms
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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enum:
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- 33
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- 40
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@ -187,11 +188,11 @@ properties:
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ti,strobe-sel:
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description: strobe select delay for HS400 speed mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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ti,clkbuf-sel:
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description: Clock Delay Buffer Select
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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ti,fails-without-test-cd:
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$ref: /schemas/types.yaml#/definitions/flag
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