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pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins

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After updating to a more recent version of the Armada 375, we realized
that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.15+
Fixes: ce3ed59dcd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Thomas Petazzoni 2015-06-09 18:46:55 +02:00 committed by Linus Walleij
parent 438881dfdd
commit e5447d2609
2 changed files with 2 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt
View File

@ -22,8 +22,8 @@ mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
mpp6 6 gpio, dev(ad0), led(p1), audio(rclk) mpp6 6 gpio, dev(ad0), led(p1), audio(rclk)
mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk) mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)
mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0) mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0)
mpp9 9 gpio, nf(wen), spi0(sck), spi1(sck) mpp9 9 gpio, spi0(sck), spi1(sck), nand(we)
mpp10 10 gpio, nf(ren), dram(vttctrl), led(c1) mpp10 10 gpio, dram(vttctrl), led(c1), nand(re)
mpp11 11 gpio, dev(a0), led(c2), audio(sdo) mpp11 11 gpio, dev(a0), led(c2), audio(sdo)
mpp12 12 gpio, dev(a1), audio(bclk) mpp12 12 gpio, dev(a1), audio(bclk)
mpp13 13 gpio, dev(readyn), pcie0(rstoutn), pcie1(rstoutn) mpp13 13 gpio, dev(readyn), pcie0(rstoutn), pcie1(rstoutn)

2
drivers/pinctrl/mvebu/pinctrl-armada-375.c
View File

@ -98,13 +98,11 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
MPP_FUNCTION(0x5, "nand", "ce")), MPP_FUNCTION(0x5, "nand", "ce")),
MPP_MODE(9, MPP_MODE(9,
MPP_FUNCTION(0x0, "gpio", NULL), MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "nf", "wen"),
MPP_FUNCTION(0x2, "spi0", "sck"), MPP_FUNCTION(0x2, "spi0", "sck"),
MPP_FUNCTION(0x3, "spi1", "sck"), MPP_FUNCTION(0x3, "spi1", "sck"),
MPP_FUNCTION(0x5, "nand", "we")), MPP_FUNCTION(0x5, "nand", "we")),
MPP_MODE(10, MPP_MODE(10,
MPP_FUNCTION(0x0, "gpio", NULL), MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "nf", "ren"),
MPP_FUNCTION(0x2, "dram", "vttctrl"), MPP_FUNCTION(0x2, "dram", "vttctrl"),
MPP_FUNCTION(0x3, "led", "c1"), MPP_FUNCTION(0x3, "led", "c1"),
MPP_FUNCTION(0x5, "nand", "re"), MPP_FUNCTION(0x5, "nand", "re"),