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ARM: dts: marzen: Enable SCIF_CLK frequency and pins

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Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2016-01-29 11:17:23 +01:00 committed by Simon Horman
parent 1781460c9a
commit e50b5ac88d
1 changed files with 13 additions and 0 deletions
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13
arch/arm/boot/dts/r8a7779-marzen.dts
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@ -165,6 +165,9 @@
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
du_pins: du {
du0 {
renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
@ -176,6 +179,11 @@
};
};
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk_b";
renesas,function = "scif_clk";
};
ethernet_pins: ethernet {
intc {
renesas,groups = "intc_irq1_b";
@ -222,6 +230,11 @@
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";