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arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support
Commit 6167ec5c91
upstream.
A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.
If the host has some mitigation for this issue, report that
we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
host workaround on every guest exit.
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
2cfe8929f6
commit
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@ -293,4 +293,10 @@ int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
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int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
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struct kvm_device_attr *attr);
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static inline bool kvm_arm_harden_branch_predictor(void)
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{
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/* No way to detect it yet, pretend it is not there. */
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return false;
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}
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#endif /* __ARM_KVM_HOST_H__ */
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@ -384,4 +384,9 @@ static inline void __cpu_init_stage2(void)
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"PARange is %d bits, unsupported configuration!", parange);
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}
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static inline bool kvm_arm_harden_branch_predictor(void)
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{
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return cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR);
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}
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#endif /* __ARM64_KVM_HOST_H__ */
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@ -73,6 +73,11 @@
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ARM_SMCCC_SMC_32, \
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0, 1)
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#define ARM_SMCCC_ARCH_WORKAROUND_1 \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
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ARM_SMCCC_SMC_32, \
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0, 0x8000)
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#ifndef __ASSEMBLY__
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#include <linux/linkage.h>
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@ -405,13 +405,20 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
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{
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u32 func_id = smccc_get_function(vcpu);
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u32 val = PSCI_RET_NOT_SUPPORTED;
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u32 feature;
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switch (func_id) {
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case ARM_SMCCC_VERSION_FUNC_ID:
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val = ARM_SMCCC_VERSION_1_1;
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break;
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case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
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/* Nothing supported yet */
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feature = smccc_get_arg1(vcpu);
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switch(feature) {
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case ARM_SMCCC_ARCH_WORKAROUND_1:
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if (kvm_arm_harden_branch_predictor())
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val = 0;
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break;
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}
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break;
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default:
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return kvm_psci_call(vcpu);
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