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x86/irq: Simplify MSI/DMAR/HPET implementation by using common code
Use common MSI interfaces instead of private implementations of the same functionality to simplify DMAR/HPET driver implementation. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Link: http://lkml.kernel.org/r/1428905519-23704-28-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Jiang Liu
Thomas Gleixner
parent
62ac178083
commit
e390d895ae
@ -62,10 +62,8 @@ static struct irq_chip pci_msi_controller = {
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.irq_unmask = pci_msi_unmask_irq,
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.irq_mask = pci_msi_mask_irq,
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.irq_ack = irq_chip_ack_parent,
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.irq_set_affinity = msi_domain_set_affinity,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_compose_msi_msg = irq_msi_compose_msg,
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.irq_write_msi_msg = pci_msi_domain_write_msg,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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@ -153,9 +151,7 @@ static struct irq_chip pci_msi_ir_controller = {
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.irq_unmask = pci_msi_unmask_irq,
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.irq_mask = pci_msi_mask_irq,
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.irq_ack = irq_chip_ack_parent,
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.irq_set_affinity = msi_domain_set_affinity,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_write_msi_msg = pci_msi_domain_write_msg,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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@ -175,23 +171,6 @@ struct irq_domain *arch_create_msi_irq_domain(struct irq_domain *parent)
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#endif
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#ifdef CONFIG_DMAR_TABLE
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static int
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dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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{
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struct irq_data *parent = data->parent_data;
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struct msi_msg msg;
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int ret;
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ret = parent->chip->irq_set_affinity(parent, mask, force);
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if (ret >= 0) {
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irq_chip_compose_msi_msg(data, &msg);
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dmar_msi_write(data->irq, &msg);
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}
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return ret;
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}
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static void dmar_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
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{
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dmar_msi_write(data->irq, msg);
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@ -202,67 +181,37 @@ static struct irq_chip dmar_msi_controller = {
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.irq_unmask = dmar_msi_unmask,
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.irq_mask = dmar_msi_mask,
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.irq_ack = irq_chip_ack_parent,
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.irq_set_affinity = dmar_msi_set_affinity,
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.irq_set_affinity = msi_domain_set_affinity,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_compose_msi_msg = irq_msi_compose_msg,
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.irq_write_msi_msg = dmar_msi_write_msg,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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static int dmar_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *arg)
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static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
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msi_alloc_info_t *arg)
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{
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struct irq_alloc_info *info = arg;
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int ret;
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if (nr_irqs > 1 || !info || info->type != X86_IRQ_ALLOC_TYPE_DMAR)
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return -EINVAL;
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if (irq_find_mapping(domain, info->dmar_id)) {
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pr_warn("IRQ for DMAR%d already exists.\n", info->dmar_id);
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return -EEXIST;
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}
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ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
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if (ret >= 0) {
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irq_domain_set_hwirq_and_chip(domain, virq, info->dmar_id,
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&dmar_msi_controller, NULL);
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irq_set_handler_data(virq, info->dmar_data);
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__irq_set_handler(virq, handle_edge_irq, 0, "edge");
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}
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return ret;
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return arg->dmar_id;
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}
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static void dmar_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs)
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static int dmar_msi_init(struct irq_domain *domain,
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struct msi_domain_info *info, unsigned int virq,
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irq_hw_number_t hwirq, msi_alloc_info_t *arg)
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{
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BUG_ON(nr_irqs > 1);
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irq_domain_free_irqs_top(domain, virq, nr_irqs);
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irq_domain_set_info(domain, virq, arg->dmar_id, info->chip, NULL,
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handle_edge_irq, arg->dmar_data, "edge");
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return 0;
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}
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static void dmar_domain_activate(struct irq_domain *domain,
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struct irq_data *irq_data)
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{
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struct msi_msg msg;
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static struct msi_domain_ops dmar_msi_domain_ops = {
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.get_hwirq = dmar_msi_get_hwirq,
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.msi_init = dmar_msi_init,
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};
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BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
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dmar_msi_write(irq_data->irq, &msg);
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}
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static void dmar_domain_deactivate(struct irq_domain *domain,
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struct irq_data *irq_data)
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{
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struct msi_msg msg;
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memset(&msg, 0, sizeof(msg));
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dmar_msi_write(irq_data->irq, &msg);
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}
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static struct irq_domain_ops dmar_domain_ops = {
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.alloc = dmar_domain_alloc,
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.free = dmar_domain_free,
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.activate = dmar_domain_activate,
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.deactivate = dmar_domain_deactivate,
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static struct msi_domain_info dmar_msi_domain_info = {
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.ops = &dmar_msi_domain_ops,
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.chip = &dmar_msi_controller,
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};
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static struct irq_domain *dmar_get_irq_domain(void)
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@ -271,11 +220,9 @@ static struct irq_domain *dmar_get_irq_domain(void)
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static DEFINE_MUTEX(dmar_lock);
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mutex_lock(&dmar_lock);
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if (dmar_domain == NULL) {
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dmar_domain = irq_domain_add_tree(NULL, &dmar_domain_ops, NULL);
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if (dmar_domain)
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dmar_domain->parent = x86_vector_domain;
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}
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if (dmar_domain == NULL)
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dmar_domain = msi_create_irq_domain(NULL, &dmar_msi_domain_info,
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x86_vector_domain);
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mutex_unlock(&dmar_lock);
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return dmar_domain;
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@ -309,23 +256,9 @@ void dmar_free_hwirq(int irq)
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#ifdef CONFIG_HPET_TIMER
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static inline int hpet_dev_id(struct irq_domain *domain)
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{
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return (int)(long)domain->host_data;
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}
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struct msi_domain_info *info = msi_get_domain_info(domain);
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static int hpet_msi_set_affinity(struct irq_data *data,
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const struct cpumask *mask, bool force)
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{
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struct irq_data *parent = data->parent_data;
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struct msi_msg msg;
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int ret;
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ret = parent->chip->irq_set_affinity(parent, mask, force);
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if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
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irq_chip_compose_msi_msg(data, &msg);
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hpet_msi_write(data->handler_data, &msg);
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}
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return ret;
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return (int)(long)info->data;
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}
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static void hpet_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
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@ -338,79 +271,63 @@ static struct irq_chip hpet_msi_controller = {
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.irq_unmask = hpet_msi_unmask,
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.irq_mask = hpet_msi_mask,
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.irq_ack = irq_chip_ack_parent,
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.irq_set_affinity = hpet_msi_set_affinity,
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.irq_set_affinity = msi_domain_set_affinity,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_compose_msi_msg = irq_msi_compose_msg,
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.irq_write_msi_msg = hpet_msi_write_msg,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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static int hpet_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *arg)
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static irq_hw_number_t hpet_msi_get_hwirq(struct msi_domain_info *info,
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msi_alloc_info_t *arg)
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{
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struct irq_alloc_info *info = arg;
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int ret;
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if (nr_irqs > 1 || !info || info->type != X86_IRQ_ALLOC_TYPE_HPET)
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return -EINVAL;
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if (irq_find_mapping(domain, info->hpet_index)) {
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pr_warn("IRQ for HPET%d already exists.\n", info->hpet_index);
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return -EEXIST;
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}
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ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
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if (ret >= 0) {
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irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);
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irq_domain_set_hwirq_and_chip(domain, virq, info->hpet_index,
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&hpet_msi_controller, NULL);
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irq_set_handler_data(virq, info->hpet_data);
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__irq_set_handler(virq, handle_edge_irq, 0, "edge");
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}
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return ret;
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return arg->hpet_index;
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}
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static void hpet_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs)
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static int hpet_msi_init(struct irq_domain *domain,
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struct msi_domain_info *info, unsigned int virq,
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irq_hw_number_t hwirq, msi_alloc_info_t *arg)
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{
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irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);
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irq_domain_set_info(domain, virq, arg->hpet_index, info->chip, NULL,
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handle_edge_irq, arg->hpet_data, "edge");
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return 0;
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}
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static void hpet_msi_free(struct irq_domain *domain,
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struct msi_domain_info *info, unsigned int virq)
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{
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BUG_ON(nr_irqs > 1);
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irq_clear_status_flags(virq, IRQ_MOVE_PCNTXT);
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irq_domain_free_irqs_top(domain, virq, nr_irqs);
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}
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static void hpet_domain_activate(struct irq_domain *domain,
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struct irq_data *irq_data)
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{
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struct msi_msg msg;
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static struct msi_domain_ops hpet_msi_domain_ops = {
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.get_hwirq = hpet_msi_get_hwirq,
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.msi_init = hpet_msi_init,
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.msi_free = hpet_msi_free,
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};
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BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
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hpet_msi_write(irq_get_handler_data(irq_data->irq), &msg);
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}
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static void hpet_domain_deactivate(struct irq_domain *domain,
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struct irq_data *irq_data)
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{
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struct msi_msg msg;
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memset(&msg, 0, sizeof(msg));
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hpet_msi_write(irq_get_handler_data(irq_data->irq), &msg);
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}
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static struct irq_domain_ops hpet_domain_ops = {
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.alloc = hpet_domain_alloc,
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.free = hpet_domain_free,
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.activate = hpet_domain_activate,
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.deactivate = hpet_domain_deactivate,
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static struct msi_domain_info hpet_msi_domain_info = {
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.ops = &hpet_msi_domain_ops,
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.chip = &hpet_msi_controller,
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};
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struct irq_domain *hpet_create_irq_domain(int hpet_id)
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{
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struct irq_domain *parent;
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struct irq_alloc_info info;
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struct msi_domain_info *domain_info;
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if (x86_vector_domain == NULL)
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return NULL;
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domain_info = kzalloc(sizeof(*domain_info), GFP_KERNEL);
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if (!domain_info)
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return NULL;
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*domain_info = hpet_msi_domain_info;
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domain_info->data = (void *)(long)hpet_id;
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init_irq_alloc_info(&info, NULL);
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info.type = X86_IRQ_ALLOC_TYPE_HPET;
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info.hpet_id = hpet_id;
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@ -420,8 +337,7 @@ struct irq_domain *hpet_create_irq_domain(int hpet_id)
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else
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hpet_msi_controller.name = "IR-HPET-MSI";
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return irq_domain_add_hierarchy(parent, 0, 0, NULL, &hpet_domain_ops,
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(void *)(long)hpet_id);
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return msi_create_irq_domain(NULL, domain_info, parent);
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}
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int hpet_assign_irq(struct irq_domain *domain, struct hpet_dev *dev,
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