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net: dsa: microchip: enable port queues for tc mqprio
LAN937x family of switches has 8 queues per port where the KSZ switches has 4 queues per port. By default, only one queue per port is enabled. The queues are configurable in 2, 4 or 8. This patch add 8 number of queues for LAN937x and 4 for other switches. In the tag_ksz.c file, prioirty of the packet is queried using the skb buffer and the corresponding value is updated in the tag. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
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3176eb8268
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e30f33a5f5
@ -980,6 +980,22 @@ int ksz9477_set_ageing_time(struct ksz_device *dev, unsigned int msecs)
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return ksz_write8(dev, REG_SW_LUE_CTRL_0, value);
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}
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void ksz9477_port_queue_split(struct ksz_device *dev, int port)
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{
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u8 data;
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if (dev->info->num_tx_queues == 8)
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data = PORT_EIGHT_QUEUE;
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else if (dev->info->num_tx_queues == 4)
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data = PORT_FOUR_QUEUE;
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else if (dev->info->num_tx_queues == 2)
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data = PORT_TWO_QUEUE;
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else
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data = PORT_SINGLE_QUEUE;
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ksz_prmw8(dev, port, REG_PORT_CTRL_0, PORT_QUEUE_SPLIT_MASK, data);
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}
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void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
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{
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struct dsa_switch *ds = dev->ds;
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@ -991,6 +1007,8 @@ void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
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ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_TAIL_TAG_ENABLE,
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true);
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ksz9477_port_queue_split(dev, port);
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ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_MAC_LOOPBACK, false);
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/* set back pressure */
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@ -56,5 +56,6 @@ int ksz9477_reset_switch(struct ksz_device *dev);
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int ksz9477_dsa_init(struct ksz_device *dev);
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int ksz9477_switch_init(struct ksz_device *dev);
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void ksz9477_switch_exit(struct ksz_device *dev);
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void ksz9477_port_queue_split(struct ksz_device *dev, int port);
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#endif
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@ -850,7 +850,11 @@
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#define PORT_FORCE_TX_FLOW_CTRL BIT(4)
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#define PORT_FORCE_RX_FLOW_CTRL BIT(3)
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#define PORT_TAIL_TAG_ENABLE BIT(2)
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#define PORT_QUEUE_SPLIT_ENABLE 0x3
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#define PORT_QUEUE_SPLIT_MASK GENMASK(1, 0)
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#define PORT_EIGHT_QUEUE 0x3
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#define PORT_FOUR_QUEUE 0x2
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#define PORT_TWO_QUEUE 0x1
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#define PORT_SINGLE_QUEUE 0x0
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#define REG_PORT_CTRL_1 0x0021
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@ -1080,6 +1080,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x07, /* can be configured as cpu port */
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.port_cnt = 3, /* total port count */
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.port_nirqs = 3,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1106,6 +1107,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.num_statics = 8,
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.cpu_ports = 0x10, /* can be configured as cpu port */
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.port_cnt = 5, /* total cpu and user ports */
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.num_tx_queues = 4,
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.ops = &ksz8_dev_ops,
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.ksz87xx_eee_link_erratum = true,
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.mib_names = ksz9477_mib_names,
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@ -1144,6 +1146,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.num_statics = 8,
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.cpu_ports = 0x10, /* can be configured as cpu port */
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.port_cnt = 5, /* total cpu and user ports */
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.num_tx_queues = 4,
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.ops = &ksz8_dev_ops,
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.ksz87xx_eee_link_erratum = true,
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.mib_names = ksz9477_mib_names,
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@ -1168,6 +1171,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.num_statics = 8,
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.cpu_ports = 0x10, /* can be configured as cpu port */
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.port_cnt = 5, /* total cpu and user ports */
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.num_tx_queues = 4,
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.ops = &ksz8_dev_ops,
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.ksz87xx_eee_link_erratum = true,
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.mib_names = ksz9477_mib_names,
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@ -1192,6 +1196,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.num_statics = 8,
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.cpu_ports = 0x4, /* can be configured as cpu port */
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.port_cnt = 3,
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.num_tx_queues = 4,
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.ops = &ksz8_dev_ops,
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.mib_names = ksz88xx_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),
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@ -1213,6 +1218,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x7F, /* can be configured as cpu port */
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.port_cnt = 7, /* total physical port count */
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.port_nirqs = 4,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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@ -1245,6 +1251,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x3F, /* can be configured as cpu port */
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.port_cnt = 6, /* total physical port count */
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.port_nirqs = 2,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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@ -1277,6 +1284,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x7F, /* can be configured as cpu port */
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.port_cnt = 7, /* total physical port count */
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.port_nirqs = 2,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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@ -1307,6 +1315,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x07, /* can be configured as cpu port */
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.port_cnt = 3, /* total port count */
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.port_nirqs = 2,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1332,6 +1341,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x07, /* can be configured as cpu port */
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.port_cnt = 3, /* total port count */
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.port_nirqs = 3,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1357,6 +1367,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x7F, /* can be configured as cpu port */
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.port_cnt = 7, /* total physical port count */
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.port_nirqs = 3,
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.num_tx_queues = 4,
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.ops = &ksz9477_dev_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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@ -1387,6 +1398,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x10, /* can be configured as cpu port */
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.port_cnt = 5, /* total physical port count */
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.port_nirqs = 6,
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.num_tx_queues = 8,
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.ops = &lan937x_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1411,6 +1423,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x30, /* can be configured as cpu port */
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.port_cnt = 6, /* total physical port count */
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.port_nirqs = 6,
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.num_tx_queues = 8,
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.ops = &lan937x_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1435,6 +1448,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x30, /* can be configured as cpu port */
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.port_cnt = 8, /* total physical port count */
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.port_nirqs = 6,
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.num_tx_queues = 8,
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.ops = &lan937x_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1463,6 +1477,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x38, /* can be configured as cpu port */
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.port_cnt = 5, /* total physical port count */
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.port_nirqs = 6,
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.num_tx_queues = 8,
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.ops = &lan937x_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -1491,6 +1506,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.cpu_ports = 0x30, /* can be configured as cpu port */
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.port_cnt = 8, /* total physical port count */
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.port_nirqs = 6,
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.num_tx_queues = 8,
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.ops = &lan937x_dev_ops,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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@ -2065,6 +2081,8 @@ static int ksz_setup(struct dsa_switch *ds)
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dev->dev_ops->enable_stp_addr(dev);
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ds->num_tx_queues = dev->info->num_tx_queues;
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regmap_update_bits(dev->regmap[0], regs[S_MULTICAST_CTRL],
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MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE);
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@ -49,6 +49,7 @@ struct ksz_chip_data {
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int cpu_ports;
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int port_cnt;
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u8 port_nirqs;
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u8 num_tx_queues;
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const struct ksz_dev_ops *ops;
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bool phy_errata_9477;
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bool ksz87xx_eee_link_erratum;
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@ -15,6 +15,7 @@
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#include "lan937x_reg.h"
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#include "ksz_common.h"
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#include "ksz9477.h"
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#include "lan937x.h"
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static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
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@ -180,6 +181,9 @@ void lan937x_port_setup(struct ksz_device *dev, int port, bool cpu_port)
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lan937x_port_cfg(dev, port, REG_PORT_CTRL_0,
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PORT_TAIL_TAG_ENABLE, true);
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/* Enable the Port Queue split */
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ksz9477_port_queue_split(dev, port);
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/* set back pressure for half duplex */
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lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_1, PORT_BACK_PRESSURE,
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true);
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@ -178,6 +178,7 @@ MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ8795, KSZ8795_NAME);
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#define KSZ9477_PTP_TAG_LEN 4
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#define KSZ9477_PTP_TAG_INDICATION 0x80
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#define KSZ9477_TAIL_TAG_PRIO GENMASK(8, 7)
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#define KSZ9477_TAIL_TAG_OVERRIDE BIT(9)
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#define KSZ9477_TAIL_TAG_LOOKUP BIT(10)
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@ -269,6 +270,8 @@ static struct sk_buff *ksz_defer_xmit(struct dsa_port *dp, struct sk_buff *skb)
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static struct sk_buff *ksz9477_xmit(struct sk_buff *skb,
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struct net_device *dev)
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{
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u16 queue_mapping = skb_get_queue_mapping(skb);
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u8 prio = netdev_txq_to_tc(dev, queue_mapping);
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struct dsa_port *dp = dsa_slave_to_port(dev);
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__be16 *tag;
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u8 *addr;
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@ -285,6 +288,8 @@ static struct sk_buff *ksz9477_xmit(struct sk_buff *skb,
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val = BIT(dp->index);
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val |= FIELD_PREP(KSZ9477_TAIL_TAG_PRIO, prio);
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if (is_link_local_ether_addr(addr))
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val |= KSZ9477_TAIL_TAG_OVERRIDE;
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@ -322,12 +327,15 @@ static const struct dsa_device_ops ksz9477_netdev_ops = {
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DSA_TAG_DRIVER(ksz9477_netdev_ops);
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MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ9477, KSZ9477_NAME);
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#define KSZ9893_TAIL_TAG_PRIO GENMASK(4, 3)
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#define KSZ9893_TAIL_TAG_OVERRIDE BIT(5)
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#define KSZ9893_TAIL_TAG_LOOKUP BIT(6)
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static struct sk_buff *ksz9893_xmit(struct sk_buff *skb,
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struct net_device *dev)
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{
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u16 queue_mapping = skb_get_queue_mapping(skb);
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u8 prio = netdev_txq_to_tc(dev, queue_mapping);
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struct dsa_port *dp = dsa_slave_to_port(dev);
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u8 *addr;
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u8 *tag;
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@ -343,6 +351,8 @@ static struct sk_buff *ksz9893_xmit(struct sk_buff *skb,
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*tag = BIT(dp->index);
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*tag |= FIELD_PREP(KSZ9893_TAIL_TAG_PRIO, prio);
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if (is_link_local_ether_addr(addr))
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*tag |= KSZ9893_TAIL_TAG_OVERRIDE;
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@ -384,11 +394,14 @@ MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ9893, KSZ9893_NAME);
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#define LAN937X_TAIL_TAG_BLOCKING_OVERRIDE BIT(11)
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#define LAN937X_TAIL_TAG_LOOKUP BIT(12)
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#define LAN937X_TAIL_TAG_VALID BIT(13)
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#define LAN937X_TAIL_TAG_PRIO GENMASK(10, 8)
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#define LAN937X_TAIL_TAG_PORT_MASK 7
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static struct sk_buff *lan937x_xmit(struct sk_buff *skb,
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struct net_device *dev)
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{
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u16 queue_mapping = skb_get_queue_mapping(skb);
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u8 prio = netdev_txq_to_tc(dev, queue_mapping);
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struct dsa_port *dp = dsa_slave_to_port(dev);
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const struct ethhdr *hdr = eth_hdr(skb);
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__be16 *tag;
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@ -403,6 +416,8 @@ static struct sk_buff *lan937x_xmit(struct sk_buff *skb,
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val = BIT(dp->index);
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val |= FIELD_PREP(LAN937X_TAIL_TAG_PRIO, prio);
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if (is_link_local_ether_addr(hdr->h_dest))
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val |= LAN937X_TAIL_TAG_BLOCKING_OVERRIDE;
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