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Signed-off-by: Jody McIntyre <scjody@modernduck.com>
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@ -572,6 +572,7 @@ static void ohci_initialize(struct ti_ohci *ohci)
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OHCI1394_reqTxComplete |
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OHCI1394_isochRx |
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OHCI1394_isochTx |
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OHCI1394_postedWriteErr |
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OHCI1394_cycleInconsistent);
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/* Enable link */
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@ -2374,7 +2375,10 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
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event &= ~OHCI1394_unrecoverableError;
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}
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if (event & OHCI1394_postedWriteErr) {
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PRINT(KERN_ERR, "physical posted write error");
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/* no recovery strategy yet, had to involve protocol drivers */
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}
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if (event & OHCI1394_cycleInconsistent) {
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/* We subscribe to the cycleInconsistent event only to
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* clear the corresponding event bit... otherwise,
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@ -2382,7 +2386,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
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DBGMSG("OHCI1394_cycleInconsistent");
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event &= ~OHCI1394_cycleInconsistent;
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}
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if (event & OHCI1394_busReset) {
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/* The busReset event bit can't be cleared during the
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* selfID phase, so we disable busReset interrupts, to
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@ -2426,7 +2429,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
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}
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event &= ~OHCI1394_busReset;
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}
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if (event & OHCI1394_reqTxComplete) {
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struct dma_trm_ctx *d = &ohci->at_req_context;
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DBGMSG("Got reqTxComplete interrupt "
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