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KVM: ia64: Prepare some structure and routines for kvm use
Register structures are defined per SDM. Add three small routines for kernel: ia64_ttag, ia64_loadrs, ia64_flushrs Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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@ -21,6 +21,10 @@
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#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
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#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
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#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
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extern void ia64_bad_param_for_setreg (void);
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extern void ia64_bad_param_for_getreg (void);
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@ -517,6 +521,14 @@ do { \
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#define ia64_ptrd(addr, size) \
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asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
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#define ia64_ttag(addr) \
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({ \
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__u64 ia64_intri_res; \
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asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
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ia64_intri_res; \
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})
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/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
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#define ia64_lfhint_none 0
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@ -119,6 +119,69 @@ struct ia64_psr {
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__u64 reserved4 : 19;
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};
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union ia64_isr {
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__u64 val;
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struct {
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__u64 code : 16;
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__u64 vector : 8;
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__u64 reserved1 : 8;
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__u64 x : 1;
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__u64 w : 1;
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__u64 r : 1;
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__u64 na : 1;
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__u64 sp : 1;
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__u64 rs : 1;
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__u64 ir : 1;
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__u64 ni : 1;
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__u64 so : 1;
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__u64 ei : 2;
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__u64 ed : 1;
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__u64 reserved2 : 20;
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};
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};
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union ia64_lid {
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__u64 val;
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struct {
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__u64 rv : 16;
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__u64 eid : 8;
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__u64 id : 8;
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__u64 ig : 32;
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};
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};
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union ia64_tpr {
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__u64 val;
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struct {
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__u64 ig0 : 4;
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__u64 mic : 4;
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__u64 rsv : 8;
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__u64 mmi : 1;
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__u64 ig1 : 47;
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};
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};
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union ia64_itir {
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__u64 val;
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struct {
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__u64 rv3 : 2; /* 0-1 */
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__u64 ps : 6; /* 2-7 */
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__u64 key : 24; /* 8-31 */
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__u64 rv4 : 32; /* 32-63 */
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};
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};
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union ia64_rr {
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__u64 val;
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struct {
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__u64 ve : 1; /* enable hw walker */
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__u64 reserved0: 1; /* reserved */
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__u64 ps : 6; /* log page size */
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__u64 rid : 24; /* region id */
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__u64 reserved1: 32; /* reserved */
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};
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};
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/*
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* CPU type, hardware bug flags, and per-CPU state. Frequently used
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* state comes earlier:
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