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memory/tegra: Add number of TLB lines for Tegra124
Tegra124 was accidentally left out when the number of TLB lines was parameterized in commit11cec15bf3
("iommu/tegra-smmu: Parameterize number of TLB lines"). Fortunately this doesn't cause any noticeable regressions upstream, presumably because there aren't any use-cases that exercise enough pressure on the SMMU. But it is a regression nonetheless, so let's fix it. Fixes:11cec15bf3
("iommu/tegra-smmu: Parameterize number of TLB lines") Signed-off-by: Vince Hsu <vince.h@nvidia.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> [treding@nvidia.com: extract from unrelated patch] Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -1007,6 +1007,7 @@ static const struct tegra_smmu_soc tegra124_smmu_soc = {
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.num_swgroups = ARRAY_SIZE(tegra124_swgroups),
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.supports_round_robin_arbitration = true,
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.supports_request_limit = true,
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.num_tlb_lines = 32,
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.num_asids = 128,
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};
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