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drm/i915: Expand error state's address width to 64b
v2: For semaphore errors, object is mapped to GGTT and offset will not be > 4GB, print only lower 32-bits (Akash) v3: Print gtt_offset in groups of 32-bit (Chris) Cc: Akash Goel <akash.goel@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Michel Thierry <michel.thierry@intel.com> Reviewed-by: Akash Goel <akash.goel@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -547,7 +547,7 @@ struct drm_i915_error_state {
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struct drm_i915_error_object {
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int page_count;
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u32 gtt_offset;
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u64 gtt_offset;
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u32 *pages[0];
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} *ringbuffer, *batchbuffer, *wa_batchbuffer, *ctx, *hws_page;
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@ -573,7 +573,7 @@ struct drm_i915_error_state {
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u32 size;
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u32 name;
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u32 rseqno[I915_NUM_RINGS], wseqno;
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u32 gtt_offset;
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u64 gtt_offset;
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u32 read_domains;
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u32 write_domain;
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s32 fence_reg:I915_MAX_NUM_FENCE_BITS;
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@ -197,8 +197,9 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
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err_printf(m, " %s [%d]:\n", name, count);
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while (count--) {
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err_printf(m, " %08x %8u %02x %02x [ ",
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err->gtt_offset,
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err_printf(m, " %08x_%08x %8u %02x %02x [ ",
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upper_32_bits(err->gtt_offset),
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lower_32_bits(err->gtt_offset),
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err->size,
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err->read_domains,
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err->write_domain);
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@ -427,15 +428,17 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
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err_printf(m, " (submitted by %s [%d])",
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error->ring[i].comm,
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error->ring[i].pid);
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err_printf(m, " --- gtt_offset = 0x%08x\n",
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obj->gtt_offset);
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err_printf(m, " --- gtt_offset = 0x%08x %08x\n",
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upper_32_bits(obj->gtt_offset),
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lower_32_bits(obj->gtt_offset));
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print_error_obj(m, obj);
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}
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obj = error->ring[i].wa_batchbuffer;
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if (obj) {
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err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
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dev_priv->ring[i].name, obj->gtt_offset);
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dev_priv->ring[i].name,
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lower_32_bits(obj->gtt_offset));
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print_error_obj(m, obj);
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}
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@ -454,14 +457,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
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if ((obj = error->ring[i].ringbuffer)) {
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err_printf(m, "%s --- ringbuffer = 0x%08x\n",
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dev_priv->ring[i].name,
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obj->gtt_offset);
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lower_32_bits(obj->gtt_offset));
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print_error_obj(m, obj);
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}
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if ((obj = error->ring[i].hws_page)) {
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err_printf(m, "%s --- HW Status = 0x%08x\n",
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dev_priv->ring[i].name,
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obj->gtt_offset);
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lower_32_bits(obj->gtt_offset));
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offset = 0;
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for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
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err_printf(m, "[%04x] %08x %08x %08x %08x\n",
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@ -477,13 +480,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
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if ((obj = error->ring[i].ctx)) {
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err_printf(m, "%s --- HW Context = 0x%08x\n",
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dev_priv->ring[i].name,
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obj->gtt_offset);
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lower_32_bits(obj->gtt_offset));
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print_error_obj(m, obj);
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}
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}
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if ((obj = error->semaphore_obj)) {
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err_printf(m, "Semaphore page = 0x%08x\n", obj->gtt_offset);
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err_printf(m, "Semaphore page = 0x%08x\n",
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lower_32_bits(obj->gtt_offset));
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for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
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err_printf(m, "[%04x] %08x %08x %08x %08x\n",
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elt * 4,
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@ -591,7 +595,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
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int num_pages;
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bool use_ggtt;
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int i = 0;
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u32 reloc_offset;
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u64 reloc_offset;
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if (src == NULL || src->pages == NULL)
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return NULL;
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