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drm/amdgpu: re-structue members for ip discovery

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This is to prepare for initializing discovery tmr size per
ASIC type

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2020-03-31 15:20:49 -04:00 committed by Alex Deucher
parent 3ab6fe4b28
commit e0c116c190
3 changed files with 38 additions and 35 deletions
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5
drivers/gpu/drm/amd/amdgpu/amdgpu.h
View File

@ -765,7 +765,6 @@ struct amdgpu_device {
uint8_t *bios;
uint32_t bios_size;
struct amdgpu_bo *stolen_vga_memory;
struct amdgpu_bo *discovery_memory;
uint32_t bios_scratch_reg_offset;
uint32_t bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
@ -918,7 +917,9 @@ struct amdgpu_device {
struct amdgpu_display_manager dm;
/* discovery */
uint8_t *discovery;
uint8_t *discovery_bin;
uint32_t discovery_tmr_size;
struct amdgpu_bo *discovery_memory;
/* mes */
bool enable_mes;

56
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
View File

@ -133,9 +133,10 @@ static int hw_id_map[MAX_HWIP] = {
static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary)
{
uint64_t vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
uint64_t pos = vram_size - DISCOVERY_TMR_SIZE;
uint64_t pos = vram_size - adev->discovery_tmr_size;
amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, DISCOVERY_TMR_SIZE, false);
amdgpu_device_vram_access(adev, pos, (uint32_t *)binary,
adev->discovery_tmr_size, false);
return 0;
}
@ -167,17 +168,18 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
uint16_t checksum;
int r;
adev->discovery = kzalloc(DISCOVERY_TMR_SIZE, GFP_KERNEL);
if (!adev->discovery)
adev->discovery_tmr_size = DISCOVERY_TMR_SIZE;
adev->discovery_bin = kzalloc(adev->discovery_tmr_size, GFP_KERNEL);
if (!adev->discovery_bin)
return -ENOMEM;
r = amdgpu_discovery_read_binary(adev, adev->discovery);
r = amdgpu_discovery_read_binary(adev, adev->discovery_bin);
if (r) {
DRM_ERROR("failed to read ip discovery binary\n");
goto out;
}
bhdr = (struct binary_header *)adev->discovery;
bhdr = (struct binary_header *)adev->discovery_bin;
if (le32_to_cpu(bhdr->binary_signature) != BINARY_SIGNATURE) {
DRM_ERROR("invalid ip discovery binary signature\n");
@ -190,7 +192,7 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
size = bhdr->binary_size - offset;
checksum = bhdr->binary_checksum;
if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
size, checksum)) {
DRM_ERROR("invalid ip discovery binary checksum\n");
r = -EINVAL;
@ -200,7 +202,7 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
info = &bhdr->table_list[IP_DISCOVERY];
offset = le16_to_cpu(info->offset);
checksum = le16_to_cpu(info->checksum);
ihdr = (struct ip_discovery_header *)(adev->discovery + offset);
ihdr = (struct ip_discovery_header *)(adev->discovery_bin + offset);
if (le32_to_cpu(ihdr->signature) != DISCOVERY_TABLE_SIGNATURE) {
DRM_ERROR("invalid ip discovery data table signature\n");
@ -208,7 +210,7 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
goto out;
}
if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
ihdr->size, checksum)) {
DRM_ERROR("invalid ip discovery data table checksum\n");
r = -EINVAL;
@ -218,9 +220,9 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
info = &bhdr->table_list[GC];
offset = le16_to_cpu(info->offset);
checksum = le16_to_cpu(info->checksum);
ghdr = (struct gpu_info_header *)(adev->discovery + offset);
ghdr = (struct gpu_info_header *)(adev->discovery_bin + offset);
if (!amdgpu_discovery_verify_checksum(adev->discovery + offset,
if (!amdgpu_discovery_verify_checksum(adev->discovery_bin + offset,
ghdr->size, checksum)) {
DRM_ERROR("invalid gc data table checksum\n");
r = -EINVAL;
@ -230,16 +232,16 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
return 0;
out:
kfree(adev->discovery);
adev->discovery = NULL;
kfree(adev->discovery_bin);
adev->discovery_bin = NULL;
return r;
}
void amdgpu_discovery_fini(struct amdgpu_device *adev)
{
kfree(adev->discovery);
adev->discovery = NULL;
kfree(adev->discovery_bin);
adev->discovery_bin = NULL;
}
int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
@ -263,8 +265,8 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
return r;
}
bhdr = (struct binary_header *)adev->discovery;
ihdr = (struct ip_discovery_header *)(adev->discovery +
bhdr = (struct binary_header *)adev->discovery_bin;
ihdr = (struct ip_discovery_header *)(adev->discovery_bin +
le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
num_dies = le16_to_cpu(ihdr->num_dies);
@ -272,7 +274,7 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
for (i = 0; i < num_dies; i++) {
die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
dhdr = (struct die_header *)(adev->discovery + die_offset);
dhdr = (struct die_header *)(adev->discovery_bin + die_offset);
num_ips = le16_to_cpu(dhdr->num_ips);
ip_offset = die_offset + sizeof(*dhdr);
@ -286,7 +288,7 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
le16_to_cpu(dhdr->die_id), num_ips);
for (j = 0; j < num_ips; j++) {
ip = (struct ip *)(adev->discovery + ip_offset);
ip = (struct ip *)(adev->discovery_bin + ip_offset);
num_base_address = ip->num_base_address;
DRM_DEBUG("%s(%d) #%d v%d.%d.%d:\n",
@ -335,24 +337,24 @@ int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id,
uint16_t num_ips;
int i, j;
if (!adev->discovery) {
if (!adev->discovery_bin) {
DRM_ERROR("ip discovery uninitialized\n");
return -EINVAL;
}
bhdr = (struct binary_header *)adev->discovery;
ihdr = (struct ip_discovery_header *)(adev->discovery +
bhdr = (struct binary_header *)adev->discovery_bin;
ihdr = (struct ip_discovery_header *)(adev->discovery_bin +
le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
num_dies = le16_to_cpu(ihdr->num_dies);
for (i = 0; i < num_dies; i++) {
die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
dhdr = (struct die_header *)(adev->discovery + die_offset);
dhdr = (struct die_header *)(adev->discovery_bin + die_offset);
num_ips = le16_to_cpu(dhdr->num_ips);
ip_offset = die_offset + sizeof(*dhdr);
for (j = 0; j < num_ips; j++) {
ip = (struct ip *)(adev->discovery + ip_offset);
ip = (struct ip *)(adev->discovery_bin + ip_offset);
if (le16_to_cpu(ip->hw_id) == hw_id) {
if (major)
@ -375,13 +377,13 @@ int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev)
struct binary_header *bhdr;
struct gc_info_v1_0 *gc_info;
if (!adev->discovery) {
if (!adev->discovery_bin) {
DRM_ERROR("ip discovery uninitialized\n");
return -EINVAL;
}
bhdr = (struct binary_header *)adev->discovery;
gc_info = (struct gc_info_v1_0 *)(adev->discovery +
bhdr = (struct binary_header *)adev->discovery_bin;
gc_info = (struct gc_info_v1_0 *)(adev->discovery_bin +
le16_to_cpu(bhdr->table_list[GC].offset));
adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->gc_num_se);

12
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
View File

@ -1958,15 +1958,15 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
return r;
/*
* reserve one TMR (64K) memory at the top of VRAM which holds
* reserve TMR memory at the top of VRAM which holds
* IP Discovery data and is protected by PSP.
*/
r = amdgpu_bo_create_kernel_at(adev,
adev->gmc.real_vram_size - DISCOVERY_TMR_SIZE,
DISCOVERY_TMR_SIZE,
AMDGPU_GEM_DOMAIN_VRAM,
&adev->discovery_memory,
NULL);
adev->gmc.real_vram_size - adev->discovery_tmr_size,
adev->discovery_tmr_size,
AMDGPU_GEM_DOMAIN_VRAM,
&adev->discovery_memory,
NULL);
if (r)
return r;