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arm64: tegra: Enable AHCI on Jetson TX2
This patch enables AHCI on Jetson TX2. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -285,6 +285,10 @@
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};
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};
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};
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};
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sata@3507000 {
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status = "okay";
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};
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gpio-keys {
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gpio-keys {
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compatible = "gpio-keys";
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compatible = "gpio-keys";
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@ -1504,6 +1504,34 @@
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};
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};
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};
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};
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sata@3507000 {
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compatible = "nvidia,tegra186-ahci";
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reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
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<0x0 0x03500000 0x0 0x00007000>, /* SATA */
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<0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
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interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
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interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
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<&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
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interconnect-names = "dma-mem", "write";
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iommus = <&smmu TEGRA186_SID_SATA>;
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clocks = <&bpmp TEGRA186_CLK_SATA>,
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<&bpmp TEGRA186_CLK_SATA_OOB>;
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clock-names = "sata", "sata-oob";
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assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
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<&bpmp TEGRA186_CLK_SATA_OOB>;
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assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
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<&bpmp TEGRA186_CLK_PLLP>;
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assigned-clock-rates = <102000000>,
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<204000000>;
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resets = <&bpmp TEGRA186_RESET_SATA>,
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<&bpmp TEGRA186_RESET_SATACOLD>;
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reset-names = "sata", "sata-cold";
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status = "disabled";
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};
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bpmp: bpmp {
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bpmp: bpmp {
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compatible = "nvidia,tegra186-bpmp";
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compatible = "nvidia,tegra186-bpmp";
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interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
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interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
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