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iommu/vt-d: Fix IOTLB flushing for global pages
When flushing kernel-mode PASIDs, we need to flush global pages too. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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7f92a2e910
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@ -147,20 +147,27 @@ int intel_svm_finish_prq(struct intel_iommu *iommu)
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}
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static void intel_flush_svm_range_dev (struct intel_svm *svm, struct intel_svm_dev *sdev,
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unsigned long address, int pages, int ih)
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unsigned long address, int pages, int ih, int gl)
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{
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struct qi_desc desc;
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int mask = ilog2(__roundup_pow_of_two(pages));
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if (pages == -1 || !cap_pgsel_inv(svm->iommu->cap) ||
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mask > cap_max_amask_val(svm->iommu->cap)) {
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desc.low = QI_EIOTLB_PASID(svm->pasid) | QI_EIOTLB_DID(sdev->did) |
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QI_EIOTLB_GRAN(QI_GRAN_NONG_PASID) | QI_EIOTLB_TYPE;
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/* For global kernel pages we have to flush them in *all* PASIDs
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* because that's the only option the hardware gives us. Despite
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* the fact that they are actually only accessible through one. */
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if (gl)
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desc.low = QI_EIOTLB_PASID(svm->pasid) | QI_EIOTLB_DID(sdev->did) |
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QI_EIOTLB_GRAN(QI_GRAN_ALL_ALL) | QI_EIOTLB_TYPE;
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else
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desc.low = QI_EIOTLB_PASID(svm->pasid) | QI_EIOTLB_DID(sdev->did) |
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QI_EIOTLB_GRAN(QI_GRAN_NONG_PASID) | QI_EIOTLB_TYPE;
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desc.high = 0;
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} else {
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desc.low = QI_EIOTLB_PASID(svm->pasid) | QI_EIOTLB_DID(sdev->did) |
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QI_EIOTLB_GRAN(QI_GRAN_PSI_PASID) | QI_EIOTLB_TYPE;
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desc.high = QI_EIOTLB_ADDR(address) | QI_EIOTLB_GL(1) |
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desc.high = QI_EIOTLB_ADDR(address) | QI_EIOTLB_GL(gl) |
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QI_EIOTLB_IH(ih) | QI_EIOTLB_AM(mask);
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}
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@ -191,7 +198,7 @@ static void intel_flush_svm_range_dev (struct intel_svm *svm, struct intel_svm_d
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}
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static void intel_flush_svm_range(struct intel_svm *svm, unsigned long address,
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int pages, int ih)
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int pages, int ih, int gl)
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{
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struct intel_svm_dev *sdev;
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@ -202,7 +209,7 @@ static void intel_flush_svm_range(struct intel_svm *svm, unsigned long address,
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rcu_read_lock();
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list_for_each_entry_rcu(sdev, &svm->devs, list)
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intel_flush_svm_range_dev(svm, sdev, address, pages, ih);
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intel_flush_svm_range_dev(svm, sdev, address, pages, ih, gl);
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rcu_read_unlock();
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}
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@ -211,7 +218,7 @@ static void intel_change_pte(struct mmu_notifier *mn, struct mm_struct *mm,
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{
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struct intel_svm *svm = container_of(mn, struct intel_svm, notifier);
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intel_flush_svm_range(svm, address, 1, 1);
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intel_flush_svm_range(svm, address, 1, 1, 0);
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}
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static void intel_invalidate_page(struct mmu_notifier *mn, struct mm_struct *mm,
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@ -219,7 +226,7 @@ static void intel_invalidate_page(struct mmu_notifier *mn, struct mm_struct *mm,
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{
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struct intel_svm *svm = container_of(mn, struct intel_svm, notifier);
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intel_flush_svm_range(svm, address, 1, 1);
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intel_flush_svm_range(svm, address, 1, 1, 0);
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}
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/* Pages have been freed at this point */
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@ -230,7 +237,7 @@ static void intel_invalidate_range(struct mmu_notifier *mn,
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struct intel_svm *svm = container_of(mn, struct intel_svm, notifier);
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intel_flush_svm_range(svm, start,
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(end - start + PAGE_SIZE - 1) >> VTD_PAGE_SHIFT , 0);
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(end - start + PAGE_SIZE - 1) >> VTD_PAGE_SHIFT, 0, 0);
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}
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@ -423,7 +430,7 @@ int intel_svm_unbind_mm(struct device *dev, int pasid)
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* large and has to be physically contiguous. So it's
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* hard to be as defensive as we might like. */
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intel_flush_pasid_dev(svm, sdev);
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intel_flush_svm_range_dev(svm, sdev, 0, -1, 0);
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intel_flush_svm_range_dev(svm, sdev, 0, -1, 0, !svm->mm);
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kfree_rcu(sdev, rcu);
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if (list_empty(&svm->devs)) {
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