korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-11 12:28:41 +08:00
Code Issues Packages Projects Releases Wiki Activity

phy: rockchip-typec: Do the calibration more correctly

Browse Source 
Calculate the calibration code as per the docs.  The docs talk about
reading and averaging the pullup and pulldown calibration codes.  They
also talk about adding in some adjustment codes.  Let's do what the
docs say.

In practice this doesn't seem to matter a whole lot.  On a device I
tested the pullup and pulldown codes were nearly the same (0x23 and
0x24) and the adjustment codes were 0.

Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Douglas Anderson 2017-09-22 09:44:06 -07:00 committed by Kishon Vijay Abraham I
parent f85fd4c909
commit e023b1fb52
1 changed files with 18 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
drivers/phy/rockchip/phy-rockchip-typec.c
View File

@ -560,24 +560,33 @@ static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
u16 val;
u16 tx_ana_ctrl_reg_1;
u16 tx_ana_ctrl_reg_2;
s32 pu_calib_code;
s32 pu_calib_code, pd_calib_code;
s32 pu_adj, pd_adj;
u16 calib;
/*
* Calculate calibration code as per docs: use an average of the
* pull down and pull up. Then add in adjustments.
*/
val = readl(tcphy->base + CMN_TXPUCAL_CTRL);
pu_calib_code = CMN_CALIB_CODE_POS(val);
val = readl(tcphy->base + CMN_TXPDCAL_CTRL);
pd_calib_code = CMN_CALIB_CODE_POS(val);
val = readl(tcphy->base + CMN_TXPU_ADJ_CTRL);
pu_adj = CMN_CALIB_CODE(val);
val = readl(tcphy->base + CMN_TXPD_ADJ_CTRL);
pd_adj = CMN_CALIB_CODE(val);
calib = (pu_calib_code + pd_calib_code) / 2 + pu_adj + pd_adj;
/* disable txda_cal_latch_en for rewrite the calibration values */
tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
tx_ana_ctrl_reg_1 &= ~TXDA_CAL_LATCH_EN;
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
/*
* read a resistor calibration code from CMN_TXPUCAL_CTRL[5:0] and
* write it to TX_DIG_CTRL_REG_2[5:0].
*/
val = readl(tcphy->base + CMN_TXPUCAL_CTRL);
pu_calib_code = CMN_CALIB_CODE_POS(val);
/* write the calibration, then delay 10 ms as sample in docs */
val = readl(tcphy->base + TX_DIG_CTRL_REG_2);
val &= ~(TX_RESCAL_CODE_MASK << TX_RESCAL_CODE_OFFSET);
val |= pu_calib_code << TX_RESCAL_CODE_OFFSET;
val |= calib << TX_RESCAL_CODE_OFFSET;
writel(val, tcphy->base + TX_DIG_CTRL_REG_2);
usleep_range(10000, 10050);