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mmc: MMC 4.4 DDR support
Add support for Dual Data Rate MMC cards as defined in the 4.4 specification. Signed-off-by: Hanumath Prasad <hanumath.prasad@stericsson.com> Cc: linux-mmc@vger.kernel.org Acked-by: Linus Walleij <linus.walleij@stericsson.com> Tested-by Zhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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dfc13e8402
@ -373,7 +373,8 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *req)
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readcmd = MMC_READ_SINGLE_BLOCK;
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writecmd = MMC_WRITE_BLOCK;
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}
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if (mmc_card_ddr_mode(card))
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brq.data.flags |= MMC_DDR_MODE;
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if (rq_data_dir(req) == READ) {
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brq.cmd.opcode = readcmd;
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brq.data.flags |= MMC_DATA_READ;
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@ -655,8 +656,11 @@ mmc_blk_set_blksize(struct mmc_blk_data *md, struct mmc_card *card)
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struct mmc_command cmd;
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int err;
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/* Block-addressed cards ignore MMC_SET_BLOCKLEN. */
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if (mmc_card_blockaddr(card))
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/*
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* Block-addressed and ddr mode supported cards
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* ignore MMC_SET_BLOCKLEN.
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*/
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if (mmc_card_blockaddr(card) || mmc_card_ddr_mode(card))
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return 0;
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mmc_claim_host(card->host);
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@ -258,6 +258,21 @@ static int mmc_read_ext_csd(struct mmc_card *card)
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}
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switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) {
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case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
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EXT_CSD_CARD_TYPE_26:
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card->ext_csd.hs_max_dtr = 52000000;
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card->ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_52;
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break;
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case EXT_CSD_CARD_TYPE_DDR_1_2V | EXT_CSD_CARD_TYPE_52 |
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EXT_CSD_CARD_TYPE_26:
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card->ext_csd.hs_max_dtr = 52000000;
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card->ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_1_2V;
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break;
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case EXT_CSD_CARD_TYPE_DDR_1_8V | EXT_CSD_CARD_TYPE_52 |
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EXT_CSD_CARD_TYPE_26:
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card->ext_csd.hs_max_dtr = 52000000;
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card->ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_1_8V;
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break;
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case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:
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card->ext_csd.hs_max_dtr = 52000000;
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break;
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@ -502,6 +517,18 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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mmc_set_clock(host, max_dtr);
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/*
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* Activate DDR50 mode (if supported).
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*/
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if (mmc_card_highspeed(card)) {
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if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_DDR_1_8V)
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&& (host->caps & (MMC_CAP_1_8V_DDR)))
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mmc_card_set_ddr_mode(card);
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else if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_DDR_1_2V)
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&& (host->caps & (MMC_CAP_1_2V_DDR)))
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mmc_card_set_ddr_mode(card);
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}
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/*
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* Activate wide bus (if supported).
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*/
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@ -510,10 +537,16 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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unsigned ext_csd_bit, bus_width;
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if (host->caps & MMC_CAP_8_BIT_DATA) {
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ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
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if (mmc_card_ddr_mode(card))
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ext_csd_bit = EXT_CSD_DDR_BUS_WIDTH_8;
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else
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ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
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bus_width = MMC_BUS_WIDTH_8;
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} else {
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ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
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if (mmc_card_ddr_mode(card))
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ext_csd_bit = EXT_CSD_DDR_BUS_WIDTH_4;
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else
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ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
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bus_width = MMC_BUS_WIDTH_4;
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}
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@ -48,6 +48,7 @@ struct mmc_ext_csd {
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unsigned int sa_timeout; /* Units: 100ns */
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unsigned int hs_max_dtr;
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unsigned int sectors;
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unsigned int card_type;
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unsigned int hc_erase_size; /* In sectors */
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unsigned int hc_erase_timeout; /* In milliseconds */
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unsigned int sec_trim_mult; /* Secure trim multiplier */
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@ -113,6 +114,7 @@ struct mmc_card {
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#define MMC_STATE_READONLY (1<<1) /* card is read-only */
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#define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */
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#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */
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#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */
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unsigned int quirks; /* card quirks */
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#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
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#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
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@ -154,11 +156,13 @@ struct mmc_card {
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#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
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#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
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#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR)
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#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR)
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#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
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#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
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#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
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#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
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#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
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static inline int mmc_card_lenient_fn0(const struct mmc_card *c)
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{
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@ -109,6 +109,7 @@ struct mmc_data {
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#define MMC_DATA_WRITE (1 << 8)
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#define MMC_DATA_READ (1 << 9)
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#define MMC_DATA_STREAM (1 << 10)
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#define MMC_DDR_MODE (1 << 11)
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unsigned int bytes_xfered;
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@ -158,6 +158,10 @@ struct mmc_host {
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#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
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#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
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#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
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#define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
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/* DDR mode at 1.8V */
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#define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
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/* DDR mode at 1.2V */
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mmc_pm_flag_t pm_caps; /* supported pm features */
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@ -277,11 +277,19 @@ struct _mmc_csd {
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#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
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#define EXT_CSD_CARD_TYPE_MASK 0x3 /* Mask out reserved and DDR bits */
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#define EXT_CSD_CARD_TYPE_MASK 0xF /* Mask out reserved bits */
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#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
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/* DDR mode @1.8V or 3V I/O */
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#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
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/* DDR mode @1.2V I/O */
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
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#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
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#define EXT_CSD_SEC_ER_EN BIT(0)
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#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
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